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M12L64322A-7BG2U 参数 Datasheet PDF下载

M12L64322A-7BG2U图片预览
型号: M12L64322A-7BG2U
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32位×4银行 [512K x 32 Bit x 4 Banks]
分类和应用: 存储内存集成电路动态存储器
文件页数/大小: 46 页 / 811 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC CHARACTERISTICS
(AC operating condition unless otherwise noted)
Parameter
CAS latency = 3
CAS latency = 2
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Note:
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
t
SAC
2
2
2
2
1.5
1
1
4.5
6
Symbol
Min
CLK cycle time
t
CC
5
10
4.5
6
2
2
2.5
2.5
1.5
1
1
5.5
6
-5
Max
1000
Min
6
10
5.5
6
-6
Max
1000
M12L64322A (2U)
-7
Min
7
10
6
6
2
2
2.5
2.5
2
1
1
6
6
Max
1000
Unit
Note
ns
1
ns
1,2
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
ns
ns
ns
ns
ns
ns
ns
2
3
3
3
3
2
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2010
Revision: 1.0
7/46