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M12L64164A-6BG2Y 参数 Datasheet PDF下载

M12L64164A-6BG2Y图片预览
型号: M12L64164A-6BG2Y
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行 [1M x 16 Bit x 4 Banks]
分类和应用: 存储内存集成电路动态存储器
文件页数/大小: 45 页 / 1260 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC CHARACTERISTICS
(AC operating condition unless otherwise noted)
PARAMATER
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Note:
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
SYMBOL
t
CC
-5
MIN
5
7.5
MAX
1000
5
6
2
2
2
2
1.5
1
0
4.5
6
2.5
2.5
2.5
2.5
1.5
1
0
5.5
6
MIN
6
9.8
-6
MAX
1000
5.5
6
M12L64164A (2Y)
-7
MIN
7
9.8
MAX
1000
6
6
2.5
2.5
2.5
2.5
1.5
1
0
6
6
UNIT
ns
NOTE
1
t
SAC
ns
1,2
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
ns
ns
ns
ns
ns
ns
ns
2
3
3
3
3
2
-
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2012
Revision: 1.1
6/45