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M12L64164A-6BIG2Y 参数 Datasheet PDF下载

M12L64164A-6BIG2Y图片预览
型号: M12L64164A-6BIG2Y
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 4MX16, 5.5ns, CMOS, PBGA54, 8 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, VBGA-54]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 45 页 / 1257 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Operating ambient temperature
Storage temperature
Power dissipation
Short circuit current
Note:
SYMBOL
V
IN
, V
OUT
V
DD
, V
DDQ
T
A
T
STG
P
D
I
OS
VALUE
-1.0 ~ 4.6
-1.0 ~ 4.6
-40 ~ +85
-55 ~ +150
1
50
M12L64164A (2Y)
Operation Temperature Condition -40°C~85°C
UNIT
V
V
°
C
°
C
W
mA
Permanent device damage may occur if ABSOLUTE MAXIMUM RATING are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITION
Recommended operating conditions (Voltage referenced to VSS = 0V)
PARAMETER
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
Note:
SYMBOL
V
DD
, V
DDQ
V
IH
V
IL
V
OH
V
OL
I
IL
I
OL
MIN
3.0
2.0
-0.3
2.4
-
-5
-5
TYP
3.3
3.0
0
-
-
-
-
MAX
3.6
V
DD
+0.3
0.8
-
0.4
5
5
UNIT
V
V
V
V
V
1
2
I
OH
= -2mA
I
OL
= 2mA
3
4
NOTE
μ
A
μ
A
1. V
IH
(max) = 4.6V AC for pulse width
10ns acceptable.
2. V
IL
(min) = -1.5V AC for pulse width
10ns acceptable.
3. Any input 0V
V
IN
V
DD
, all other pins are not under test = 0V.
4. D
out
is disabled, 0V
V
OUT
V
DD
.
CAPACITANCE
(V
DD
= 3.3V, T
A
= 25
°
C , f = 1MHz)
PARAMETER
Input capacitance (A0 ~ A11, BA0 ~ BA1)
Input capacitance
(CLK, CKE, CS , RAS , CAS ,
WE
&
L(U)DQM)
Data input/output capacitance (DQ0 ~ DQ15)
C
IN2
C
OUT
2
2
4
6
pF
pF
SYMBOL
C
IN1
MIN
2
MAX
4
UNIT
pF
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2012
Revision: 1.1
3/45