ESMT
M12L32162A
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
-5.5
-6
-7
Parameter
CAS Latency =3
Symbol
Unit
Note
Min
5.5
10
Max
Min
6
Max
Min
7
Max
CLK cycle time
tCC
1000
1000
ns
1
1
1000
CAS Latency =2
CAS Latency =3
CAS Latency =2
10
10
6
6
5.5
5.5
6
6
CLK to valid
output delay
tSAC
ns
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
tOH
tCH
tCL
2
2
2
2
2
0
2.5
2.5
2.5
2
ns
ns
ns
ns
ns
ns
2
3
3
3
3
2
2
2
2
2
2
0
tSS
tSH
tSLZ
Input hold time
2
CLK to output in Low-Z
0
CAS Latency =3
CAS latency =2
6
6
CLK to output in
Hi-Z
5.5
5.5
6
6
tSHZ
ns
*All AC parameters are measured from half to half.
Note: 1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.
-5.5
Symbol
Parameter
CAS Latency =3
CAS Latency =2
Unit
ns
Note
Min
Max
5.5
CLK to valid
output delay
tSAC
4
4
5.5
Output data hold time
tOH
ns
2
CAS Latency =3
CAS Latency =2
5.5
5.5
CLK to output in
Hi-Z
tSHZ
ns
4
Note: 4. Special condition (Output Load ≤ 10 ohm+10 pF)
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2009
Revision : 1.2 6/29