ESMT
M12L2561616A
Operation Temperature Condition -40~85°C
AC OPERATING TEST CONDITIONS (VDD = 3.3V ± 0.3V ,TA = -40 to 85°C )
Parameter
Input levels (Vih/Vil)
Value
2.4/0.4
1.4
Unit
V
Input timing measurement reference level
Input rise and fall-time
V
tr/tf = 1/1
1.4
ns
V
Output timing measurement reference level
Output load condition
See Fig. 2
(Fig. 1) DC Output Load Circuit
(Fig. 2) AC Output Load Circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Version
Parameter
Symbol
Unit
Note
-6
12
18
18
-7
14
20
20
Row active to row active delay
tRRD(min)
tRCD(min)
ns
ns
1
1
RAS to CAS delay
Row precharge time
tRP(min)
ns
ns
1
1
tRAS(min)
42
45
Row active time
tRAS(max)
tRC(min)
100
us
ns
@ Operating
1
60
60
63
70
Row cycle time
@ Auto refresh tRFC(min)
ns
tCK
tCK
tCK
ms
1,5
2
Last data in to col. address delay
Last data in to row precharge
Last data in to burst stop
tCDL(min)
tRDL(min)
tBDL(min)
tREF(max)
1
2
2
1
2
Refresh period (8,192 rows)
64
6
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2008
Revision: 1.2 5/45