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M12L2561616A-6BIG2S 参数 Datasheet PDF下载

M12L2561616A-6BIG2S图片预览
型号: M12L2561616A-6BIG2S
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 8 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, BGA-54]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 45 页 / 1010 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC CHARACTERISTICS
(AC operating condition unless otherwise noted)
Parameter
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
Symbol
Min
CLK cycle time
CLK to valid
output delay
Output data
hold time
t
CC
t
SAC
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
2
2
2
2
1.5
0.8
1
5
5.4
5
10
-5
Max
1000
5
5.4
2.5
2.5
2.5
2.5
1.5
0.8
1
Min
6
10
-6
M12L2561616A (2S)
Operation Temperature Condition -40
°
C~85
°
C
-7
Max
1000
5.4
5.4
2.5
2.5
2.5
2.5
1.5
0.8
1
5.4
5.4
5.4
5.4
Min
7
10
Max
1000
5.4
5.4
Unit Note
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1,2
2
3
3
3
3
2
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Note:
CAS latency = 3
CAS latency = 2
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns. transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2015
Revision: 1.4
6/45