M12L16161A
*Note: 1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BA.
BA
0
Active & Read/Write
Bank A
1
Bank B
3.Enable and disable auto precharge function are controlled by A10/AP in read/write command.
A10/AP BA
Operation
0
1
0
1
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
0
1
4.A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP BA
precharge
Bank A
Bank B
0
0
1
0
1
X
Both Banks
:
Publication Da te J an. 2000
Elite Semiconductor Memory Technology Inc.
P.12
:
Revis ion 1.3u
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
