ESMT
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted，T
A
= 0 to 70 °C
Test Condition
Burst Length = 1
I
CC1
I
CC2P
I
CC2PS
I
CC2N
I
CC2NS
Active Standby Current
in power-down mode
I
CC3P
I
CC3PS
I
CC3N
I
CC3NS
t
RC
≥
t
RC
(min)
I
OL
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
=15ns
Input signals are changed one time during 2clks
All other pins
≥
VDD-0.2V or
≤
0.2V
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
input signals are stable
I
OL
= 0 mA
Page Burst
2 Banks activated
t
CC
= t
CC
(min)
t
RFC
≥
t
RFC
(min)
CKE
≤
0.2V
M12L128324A
Version
-6
120
2
1
25
mA
9
7
6
30
15
mA
mA
mA
-7
100
Unit
Note
Parameter
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
Symbol
mA
1,2
mA
Precharge Standby Current
in non power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
Note:
I
CC4
270
240
mA
mA
mA
1,2
I
CC5
I
CC6
270
2
240
1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.4
5/46
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
