EliteMT
(Continued)
PARAMETER
Read Command Hold Time Reference to
CAS
Read Command Hold Time Reference to
RAS
SYMBOL
MIN
M11L416256SA
-35
MAX
ns
ns
ns
9,15,19
9
20
10,17,20
17,26
11,15,18
15,25
15
15
15
15,19
12,20
12,20
UNIT
NOTES
t
RCH
t
RRH
t
CLZ
t
OFF1
t
OFF2
t
WCS
t
WCH
t
WCR
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
DHR
t
RWD
t
AWD
t
CWD
t
T
t
REF
t
RPC
t
CSR
t
CHR
t
OEH
t
OES
t
OEHC
t
OEP
t
ORD
t
CLCH
t
COH
t
WHZ
t
RASS
t
RPS
t
CHS
0
0
3
3
15
8
0
5
30
5
9
7
0
5
30
51
34
26
2.5
10
10
10
4
4
2
2
0
5
3
3
100
65
-50
7
50
8
CAS
to Output in Low-Z
Output Buffer Turn-off Delay From
CAS
or
RAS
Output Buffer Turn-off to
OE
Write Command Setup Time
Write Command Hold Time
Write Command Hold Time(Reference to
RAS
)
Write Command Pulse Width
Write Command to
RAS
Lead Time
Write Command to
CAS
Lead Time
Data-in Setup Time
Data-in Hold Time
Data-in Hold Time (Reference to
RAS
)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
RAS
to
WE
Delay Time
Column Address to
WE
Delay Time
11
11
11,18
2,3
CAS
to
WE
Delay Time
Transition Time (rise or fall)
Refresh Period (512 cycles)
RAS
to
CAS
Precharge Time
CAS
Setup Time(CBR REFRESH)
CAS
Hold Time(CBR REFRESH)
OE
Hold Time From
WE
During
Read-Mode-Write Cycle
1,18
1,19
16
OE
Low to
CAS
High Setup Time
OE
High Hold Time From
CAS
High
OE
Precharge Time
OE
Setup Prior to
RAS
During Hidden
Refresh Cycle
Last
CAS
Going Low to First
CAS
Returning High
Data Output Hold After
CAS
Returning Low
Output Disable Delay From
WE
Self Refresh
RAS
Low Pulse width
Self Refresh
RAS
High Precharge Time
Self Refresh
CAS
Hold Time
ns
ns
ns
21
μ
s
ns
ns
27,28
27,28
27,28
Elite Memory Technology Inc
Publication Date: Aug. 2005
Revision
:
1.4
5/16
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
