ESMT
F49L160UA/F49L160BA
Operation Temperature condition -40°C~85°C
Figure 10. Embedded Chip Erase Timing Waveform
Read Statu s Dat a
Er as e Com mand S equ en ce( last t w o cycl e)
t A S
tW C
555h
2AAh
VA
VA
Addr es s
tA H
C E
tC H
tG H W L
OE
tW H W H 2
t W P
W E
tW P H
tC S
tD S
tD H
I n
P r o g r e s s
C o m p l e t e
10h
55h
Dat a
tB U S Y
tR B
RY/B Y
tV C S
V C C
Notes :
SA = Sector Address (for Sector Erase, VA = Valid Address for reading status data
(see "Write Operation Status")
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.4 32/51