ESMT
F49L160UA/F49L160BA
After an erase-suspended program operation is
complete, the system can once again read array data
within non-suspended sectors. The system can
determine the status of the program operation using the
DQ7 or DQ6 status bits, just as in the standard program
operation. See “Write Operation Status” for more
information.
Auto-select Command
The auto-select command sequence allows the host
system to access the manufacturer and devices
codes, and determine whether or not a sector is
protected. Table 6 shows the address and data
requirements. This method is an alternative to that
shown in Table 4, which is intended for PROM
programmers and requires VID on address bit A9.
The system may also write the auto-select command
sequence when the device is in the Erase Suspend
mode. The device allows reading auto-select codes
even at addresses within erasing sectors, since the
codes are not stored in the memory array. When the
device exits the auto-select mode, the device reverts to
the Erase Suspend mode, and is ready for another
valid operation.
The auto-select command sequence is initiated by
writing two unlock cycles, followed by the auto-select
command. The device then enters the auto-select
mode, and the system may read at any address any
number of times, without initiating another command
sequence. The read cycles at address 04H, 08H, 0CH,
and 00H retrieves the ESMT manufacturer ID. A read
cycle at address 01H retrieves the device ID. A read
cycle containing a sector address (SA) and the address
02H returns 01H if that sector is protected, or 00H if it is
unprotected. Refer to Tables 1 and 2 for valid sector
addresses.
The system must write the Erase Resume command
(address bits are “don’t care” as shown in Table 5) to
exit the erase suspend mode and continue the sector
erase operation. Further writes of the Resume
command are ignored. Another Erase Suspend
command can be written after the device has resumed
erasing.
The system must write the reset command to exit the
auto-select mode and return to reading array data.
7.3 Write Operation Status
The device provides several bits to determine the
RY/
, DQ7, and DQ6 each offer a method for
BY
status of a write operation: RY/
DQ5, DQ3, DQ2, and. Table 7 and the following
subsections describe the functions of these bits.
, DQ7, DQ6,
determining whether a program or erase operation
is complete or in progress.
BY
Table 7. Write Operation Status
DQ7
DQ5
(Note2)
Status
DQ6
DQ3 DQ2
RY/
BY
(Note1)
No
N/A
Embedded Program Algorithm
Embedded Erase Algorithm
Toggle
Toggle
0
0
0
0
DQ7
0
Toggle
1
Toggle
0
1
Reading Erase Suspended
Sector
No
Toggle
In Progress
1
N/A Toggle
Reading Non-Erase
Suspended Sector
Erase Suspended Mode
Data
DQ7
DQ7
Data
Data Data Data
1
0
0
Erase Suspend Program
Toggle
Toggle
0
1
N/A
N/A
N/A
No
Toggle
Embedded Program Algorithm
Exceeded
Time Limits
Embedded Erase Algorithm
Erase Suspend Program
0
Toggle
Toggle
1
1
1
Toggle
N/A
0
0
N/A
DQ7
Notes:
1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for
further details.
2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum
timing limits. See “DQ5: Exceeded Timing Limits” for more information.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.8 15/50