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F49L004UA-90N 参数 Datasheet PDF下载

F49L004UA-90N图片预览
型号: F49L004UA-90N
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K ×8 )只有3V CMOS闪存 [4 Mbit (512K x 8) 3V Only CMOS Flash Memory]
分类和应用: 闪存存储
文件页数/大小: 46 页 / 354 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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EFST  
preliminary  
F49L004UA / F49L004BA  
The system must write the Erase Resume command  
(address bits are “don’t care” as shown in Table 5) to  
exit the erase suspend mode and continue the sector  
erase operation. Further writes of the Resume  
command are ignored. Another Erase Suspend  
command can be written after the device has resumed  
erasing.  
The auto-select command sequence is initiated by  
writing two unlock cycles, followed by the auto-select  
command. The device then enters the auto-select  
mode, and the system may read at any address any  
number of times, without initiating another command  
sequence. The read cycles at address 04H, 08H, 0CH,  
and 00H retrieves the EFST manufacturer ID. A read  
cycle at address 01H retrieves the device ID. A read  
cycle containing a sector address (SA) and the address  
02H returns 01H if that sector is protected, or 00H if it is  
unprotected. Refer to Tables 1 and 2 for valid sector  
addresses.  
Auto-select Command  
The auto-select command sequence allows the host  
system to access the manufacturer and devices codes,  
and determine whether or not a sector is protected.  
Table 6 shows the address and data requirements. This  
method is an alternative to that shown in Table 4, which  
The system must write the reset command to exit the  
auto-select mode and return to reading array data.  
is intended for PROM programmers and requires VID on  
address bit A9.  
7.3 Write Operation Status  
The device provides several bits to determine the  
RY/ , DQ7, and DQ6 each offer a method for  
BY  
status of a write operation: RY/ , DQ7, DQ6, DQ5,  
BY  
determining whether a program or erase operation  
is complete or in progress.  
DQ3, DQ2, and. Table 7 and the following  
subsections describe the functions of these bits.  
Table 7. Write Operation Status  
DQ7  
DQ5  
Status  
DQ6  
DQ3 DQ2  
RY/  
BY  
(Note2)  
(Note1)  
No  
N/A  
Embedded Program Algorithm  
Embedded Erase Algorithm  
Toggle  
Toggle  
0
0
0
0
DQ7  
0
Toggle  
1
Toggle  
0
1
Reading Erase Suspended  
No  
In Progress  
1
N/A Toggle  
Sector  
Toggle  
Reading Non-Erase  
Erase Suspended Mode  
Data  
DQ7  
DQ7  
Data  
Data Data Data  
1
0
0
Suspended Sector  
Erase Suspend Program  
Toggle  
Toggle  
0
1
N/A  
N/A  
N/A  
No  
Embedded Program Algorithm  
Toggle  
Exceeded  
Embedded Erase Algorithm  
Erase Suspend Program  
0
Toggle  
Toggle  
1
1
1
Toggle  
0
0
Time Limits  
N/A  
N/A  
DQ7  
Notes:  
1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for  
further details.  
2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum  
timing limits. See “DQ5: Exceeded Timing Limits” for more information.  
Elite Flash Storage Technology Inc.  
Publication Date : Aug. 2003  
Revision: 0.2 13/46