EFST
F49L004UA / F49L004BA
The system must write the Erase Resume command
(address bits are “don’t care” as shown in Table 5) to
exit the erase suspend mode and continue the sector
erase operation. Further writes of the Resume
command are ignored. Another Erase Suspend
command can be written after the device has resumed
erasing.
The auto-select command sequence is initiated by
writing two unlock cycles, followed by the auto-select
command. The device then enters the auto-select
mode, and the system may read at any address any
number of times, without initiating another command
sequence. The read cycles at address 04H, 08H, 0CH,
and 00H retrieves the EFST manufacturer ID. A read
cycle at address 01H retrieves the device ID. A read
cycle containing a sector address (SA) and the
address 02H returns 01H if that sector is protected, or
00H if it is unprotected. Refer to Tables 1 and 2 for
valid sector addresses.
Auto-select Command
The auto-select command sequence allows the host
system to access the manufacturer and devices codes,
and determine whether or not a sector is protected.
Table 6 shows the address and data requirements. This
method is an alternative to that shown in Table 4, which
The system must write the reset command to exit the
auto-select mode and return to reading array data.
is intended for PROM programmers and requires V
on address bit A9.
ID
7.3 Write Operation Status
The device provides several bits to determine the
status of a write operation: RY/ , DQ7, DQ6,
DQ5, DQ3, DQ2, and. Table 7 and the following
subsections describe the functions of these bits.
RY/ , DQ7, and DQ6 each offer a method for
BY
determining whether a program or erase operation
is complete or in progress.
BY
Table 7. Write Operation Status
DQ7
DQ5
(Note2)
Status
DQ6
DQ3 DQ2
RY/
BY
(Note1)
No
N/A
Embedded Program Algorithm
Embedded Erase Algorithm
Toggle
Toggle
0
0
0
0
DQ7
0
Toggle
1
Toggle
0
1
Reading Erase Suspended
Sector
No
Toggle
In Progress
1
N/A Toggle
Reading Non-Erase
Suspended Sector
Erase Suspended Mode
Data
DQ7
DQ7
Data
Data Data Data
1
0
0
Erase Suspend Program
Toggle
Toggle
0
1
N/A
N/A
N/A
No
Toggle
Embedded Program Algorithm
Exceeded
Time Limits
Embedded Erase Algorithm
Erase Suspend Program
0
Toggle
Toggle
1
1
1
Toggle
N/A
0
0
N/A
DQ7
Notes:
1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection
for further details.
2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the
maximum timing limits. See “DQ5: Exceeded Timing Limits” for more information.
Elite Flash Storage Technology Inc.
Publication Date : Sep. 2003
Revision: 1.0 13/46
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
