EFST
Auto-select Mode
The auto-select mode provides manufacturer and
device identification and sector protection verification,
through outputs on DQ7–DQ0. This mode is primarily
intended for programming equipment to automatically
match a device to be programmed with its
corresponding programming algorithm. However, the
auto-select codes can also be accessed in-system
through the command register.
When using programming equipment, this mode
requires V
ID
(11.5 V to 12.5 V) on address pin A9.
While address pins A3, A2, A1, and A0 must be as
shown in Table 3.
F49B002UA
To verify sector protection, all necessary pins have to
be set as required in Table 3, the programming
equipment may then read the corresponding identifier
code on DQ7-DQ0.
To access the auto-select codes in-system, the host
system can issue the auto-select command via the
command register, as shown in Table 4. This method
does not require V
ID
. See “ Software Command
Definitions” for details on using the auto-select mode.
7.2 Software Command Definitions
Writing specific address and data commands or
sequences into the command register initiates the
device operations. Table 4 defines the valid register
command sequences. Writing incorrect address and
data values or writing them in the improper sequence
resets the device to reading array data.
All addresses are latched on the falling edge of
WE
or
CE
, whichever happens later. All data is latched on
the rising edge of
WE
or
CE
, whichever happens
first. Refer to the corresponding timing diagrams in
the AC Characteristics section.
Table 4. F49B002UA Software Command Definitions
Bus
Cycles
1
4
6
6
6
1
3
1st Bus
Cycle
Addr
RA
Data
RD
2nd Bus
Cycle
Addr
-
Data
-
3rd Bus
Cycle
Addr
-
Data
-
4th Bus
Cycle
Addr
-
PA
Data
-
PD
5th Bus
Cycle
Addr
-
Data
-
6th Bus
Cycle
Addr
-
Data
-
Command
Read (4)
Program
Chip Erase
Sector Erase
Boot block lock
Reset 1(5)
Reset 2(5)
Auto-select
Notes:
1.
5555H AAH 2AAAH 55H 5555H A0H
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H 10H
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H
SA
30H
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H 40H
XXXH
F0H
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5555H AAH 2AAAH 55H 5555H F0H
See Table 5.
X = don’t care
RA = Address of memory location to be read.
RD = Data to be read at location RA.
PA = Address of memory location to be programmed.
PD = Data to be programmed at location PA.
SA = Address of the sector.
2. Except Read command and Auto-select command, all command bus cycles are write operations.
3. Address bits A17–A16 are don’t cares.
4. No command cycles required when reading array data.
5. The two Reset command sequences have exactly the same effect, two are provided to meet the
requirements of difference companies and a range of applications.
Elite Flash Storage Technology Inc.
Publication Date : Sep. 2006
Revision: 1.4
6/33
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
