ESMT
PIN DESCRIPTION
Symbol
SCK
Pin Name
Serial Clock
Serial Data Input /
Serial Data Input Output 0
Functions
F25L32PA
To provide the timing for serial input and output operations
To transfer commands, addresses or data serially into the device. Data is
latched on the rising edge of SCK (for Standard mode). / Bidirectional IO pin to
transfer commands, addresses or data serially into the device on the rising
edge of SCK and read data or status from the device on the falling edge of
SCK(for Dual mode).
To transfer data serially out of the device. Data is shifted out on the falling edge
of SCK (for Standard mode). / Bidirectional IO pin to transfer commands,
addresses or data serially into the device on the rising edge of SCK and read
data or status from the device on the falling edge of SCK (for Dual mode).
To activate the device when CE is low.
The Write Protect (
WP
) pin is used to enable/disable BPL bit in the status
register.
To temporality stop serial communication with SPI flash memory without
resetting the device.
To provide power.
SI / SIO
0
SO / SIO
1
Serial Data Output /
Serial Data Input Output 1
Chip Enable
Write Protect
Hold
Power Supply
Ground
CE
WP
HOLD
V
DD
V
SS
FUNCTIONAL BLOCK DIAGRAM
Page Address
Latch / Counter
High Voltage
Generator
Memory
Array
Page Buffer
Status
Register
Byte Address
Latch / Counter
Y-Decoder
Command and Conrol Logic
Serial Interface
CE
SCK
SI
(SIO
0
)
SO
(SIO
1
)
WP
HOLD
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2009
Revision: 1.0
3/36
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
