欢迎访问ic37.com |
会员登录 免费注册
发布采购

F25L32PA-100PAG 参数 Datasheet PDF下载

F25L32PA-100PAG图片预览
型号: F25L32PA-100PAG
PDF下载: 下载PDF文件 查看货源
内容描述: 3V只有32兆位串行闪存,配有双 [3V Only 32 Mbit Serial Flash Memory with Dual]
分类和应用: 闪存存储
文件页数/大小: 36 页 / 373 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号F25L32PA-100PAG的Datasheet PDF文件第11页浏览型号F25L32PA-100PAG的Datasheet PDF文件第12页浏览型号F25L32PA-100PAG的Datasheet PDF文件第13页浏览型号F25L32PA-100PAG的Datasheet PDF文件第14页浏览型号F25L32PA-100PAG的Datasheet PDF文件第16页浏览型号F25L32PA-100PAG的Datasheet PDF文件第17页浏览型号F25L32PA-100PAG的Datasheet PDF文件第18页浏览型号F25L32PA-100PAG的Datasheet PDF文件第19页  
ESMT  
F25L32PA  
Fast Read Dual Output (50 MHz~100 MHz)  
The Fast Read Dual Output (3BH) instruction is similar to the  
standard Fast Read (0BH) instruction except the data is output  
on bidirectional I/O pins (SIO0 and SIO1). This allows data to be  
transferred from the device at twice the rate of standard SPI  
devices. This instruction is for quickly downloading code from  
Flash to RAM upon power-up or for applications that cache code-  
segments to RAM for execution.  
The Fast Read Dual Output instruction is initiated by executing  
an 8-bit command, 3BH, followed by address bits [A23 -A0] and a  
dummy byte. CE must remain active low for the duration of the  
Fast Read Dual Output cycle. See Figure 4 for the Fast Read  
Dual Output sequence.  
CE  
0
1
2
3
4
5
6
7
8
15 16  
23 24  
31 32  
39 40  
43 44  
MODE3  
MODE0  
47 48  
51 52  
55 56  
SCK  
SIO0  
IO0 switches from Input to Ouput  
Dummy  
3B  
ADD.  
MSB  
ADD.  
ADD.  
6
7
4
2
0
6
4
2
0
6
4
2
0
6
4
2
0
1
6
7
4
MSB  
DOUT  
N
DOUT  
N+1  
DOU T  
N+2  
DOU T  
N+3  
DOUT  
N+4  
5
HIGH IMPENANCE  
SIO1  
5
1
7
5
1
7
5
1
7
5
3
3
3
3
Note: The input data during the dummy clocks is “don’t care”.  
However , the IO0 pin should be high-impefance piror to the falling edge of the first data clock.  
Figure 4: Fast Read Dual Output Sequence  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Mar. 2009  
Revision: 1.0 15/36  
 复制成功!