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F25L32QA-100PAG2S 参数 Datasheet PDF下载

F25L32QA-100PAG2S图片预览
型号: F25L32QA-100PAG2S
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 32MX1, PDSO8, 0.208 INCH, 1.27 MM PITCH, ROHS COMPLIANT, SOIC-8]
分类和应用: 时钟光电二极管内存集成电路
文件页数/大小: 51 页 / 411 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F25L32QA (2S)  
TABLE 14: AC OPERATING CHARACTERISTICS - Continued  
50 MHz  
86 MHz  
104 MHz  
Symbol  
Parameter  
Unit  
Min  
Max  
Min  
Max  
Min  
Max  
TOH  
TV  
Output Hold from SCK Change  
0
0
0
ns  
ns  
ns  
ns  
us  
us  
us  
us  
Output Valid from SCK  
8
8
8
4
TWHSL  
20  
20  
20  
Write Protect Setup Time before CE Low  
Write Protect Hold Time after CE High  
CE High to Deep Power Down Mode  
CE High to Standby Mode ( for DP)  
CE High to Standby Mode (for RES)  
CE High to next Instruction after Suspend  
4
TSHWL  
100  
100  
100  
3
TDP  
3
3
3
3
3
3
3
TRES1  
3
TRES2  
1.8  
20  
1.8  
20  
1.8  
20  
3
TSUS  
Note:  
1. Relative to SCK.  
2. TSCKH + TSCKL must be less than or equal to 1/ FCLK  
.
3. Value guaranteed by characterization, not 100% tested in production.  
4. Only applicable as a constraint for a Write status Register instruction when Block- Protection-Look (BPL) bit is set at 1.  
TABLE 15: ERASE AND PROGRAMMING PERFORMANCE  
Limit  
Unit  
Parameter  
Symbol  
Typ2  
120  
500  
1
Max3  
250  
1000  
2
Sector Erase Time (4KB)  
TSE  
TBE1  
TBE2  
TCE  
TW  
ms  
ms  
Block Erase Time (32KB)  
Block Erase Time (64KB)  
Chip Erase Time  
s
10  
50  
15  
5
s
Write Status Register Time  
Page Programming Time  
Erase/Program Cycles1  
Data Retention  
10  
ms  
TPP  
1.5  
ms  
100,000  
20  
-
Cycles  
Years  
-
Notes:  
1. Not 100% Tested, Excludes external system level over head.  
2. Typical values measured at 25°C, 3V.  
3. Maximum values measured at 85°C, 2.65V.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Apr. 2013  
Revision: 1.7 41/51  
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