ESMT
F25L16PA
Revision History
Revision
Date
Description
1.0
Original
2008.02.25
1. Add PDIP package.
2. Add TBP1 and TBP2.
1.1
2008.03.18
1. Add Dual Output function
2. Add power-up timing specification
3. Add Revision History
1.2
2008.07.17
4. Modify tSE timing
1.Modify headline
2.Correct chip erase time of feature
3.Correct typo error
4.Delete the rating of Temperature Under Bias
1.Add 8 lead SOIC (150 mil) package
2.Modify the description of OTP mode
1.3
1.4
2009.03.10
2009.07.20
Elite Semiconductor Memory Technology Inc.
Publication Date: Jul. 2009
Revision: 1.4 32/33