欢迎访问ic37.com |
会员登录 免费注册
发布采购

F25L16PA-50PHG2S 参数 Datasheet PDF下载

F25L16PA-50PHG2S图片预览
型号: F25L16PA-50PHG2S
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 16MX1, PDSO16, 0.300 INCH, 1.27 MM PITCH, ROHS COMPLIANT, SOIC-16]
分类和应用: 时钟光电二极管内存集成电路
文件页数/大小: 42 页 / 402 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第1页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第3页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第4页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第5页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第6页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第7页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第8页浏览型号F25L16PA-50PHG2S的Datasheet PDF文件第9页  
ESMT
GENERAL DESCRIPTION
The F25L16PA is a 16Megabit, 3V only CMOS Serial Flash
memory device. The device supports the standard Serial
Peripheral Interface (SPI), and a Dual SPI. ESMT’s memory
devices reliably store memory data even after 100,000
programming and erase cycles.
The memory array can be organized into 8,192 programmable
pages of 256 byte each. 1 to 256 byte can be programmed at a
time with the Page Program instruction.
The device features sector erase architecture. The memory array
F25L16PA (2S)
is divided into 512 uniform sectors with 4K byte each; 64 uniform
blocks with 32K byte each; 32 uniform blocks with 64K byte each.
Sectors can be erased individually without affecting the data in
other sectors. Blocks can be erased individually without affecting
the data in other blocks. Whole chip erase capabilities provide
the flexibility to revise the data in the device. The device has
Sector, Block or Chip Erase but no page erase.
The sector protect/unprotect feature disables both program and
erase operations in any combination of the sectors of the
memory.
FUNCTIONAL BLOCK DIAGRAM
Page Address
Latch / Counter
High Voltage
Generator
Memory
Array
Page Buffer
Status
Register
Byte Address
Latch / Counter
Y-Decoder
Command and Conrol Logic
Serial Interface
CE
SCK
SI
(SIO
0
)
SO
(SIO
1
)
WP
HOLD
Elite Semiconductor Memory Technology Inc.
Publication Date: Nov. 2012
Revision: 1.4
2/42