ESMT
F25L04PA (2D)
memory capacity.
9. The Write-Enable (WREN) instruction and the Write-Status-Register (WRSR) instruction must work in conjunction of each
other. The WRSR instruction must be executed immediately (very next bus cycle) after the WREN instruction to make both
instructions effective. WREN can enable WRSR, user just need to execute it. A successful WRSR can reset WREN.
10. The Manufacture ID and Device ID output will repeat continuously until CE terminates the instruction.
11. Dual commands use bidirectional IO pins. DOUT and cont. are serial data out; others are serial data in.
12. Dual output data:
IO
IO
0
= (D
6
, D
4
, D
2
, D
0
), (D
6
, D
4
, D
2
, D
0
)
)
1
= (D
7
, D5
, D3
, D1
), (D
7
, D5
, D3
, D1
DOUT0
DOUT1
13. Max Load capacitance is 15pF.
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2012
Revision: 1.4 10/33
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
