PBL 386 11/2
RFB
PBL 386 11/2
RTX
KR
RRLY
VTX
-
out
+12 V /+5V
TS
AGND
RSN
DET
NC
RT
CGG
RB
+
RRX
NC
CHP
RF1
HP
RING
out
RINGX
BGND
TIPX
VBAT
VBAT2
AOV
PSG
LP
CRC
CTC
CODEC/
Filter
OVP
DB2
C1
VB
RF2
TIP
C2
C3
VCC
PLD
PLC
SPR
REF
VEE
VCC
VB2
RLD
RLC
CB2
DBB
DB
RSG
VB
SYSTEM CONTROL
INTERFACE
CB
R1
CLP
RREF
DR
ERG
DT
VEE
RRF
RRT
R2
R3
C2
C1
R4
VCC
+5 V
CVCC
CVEE
VBAT<VEE<-5 V
VEE
RESISTORS: (Values according to IEC-63 E96
series)
CAPACITORS:(Values according to IEC-63 E6
series)
DIODES:
1
RSG
RLD
RLC
RREF
RT
RTX
RB
RRX
RFB
R1
R2
R3
R4
RRT
RRF
RF1, RF2
= 23.7 kΩ 1%
= 49.9 kΩ 1%
/
/
/
/
/
/
/
/
10 W
10 W
10 W
10 W
10 W
10 W
10 W
10 W
CB
= 100 nF
= 150 nF
= 100 nF
= 100 nF
= optional
= optional
= 68 nF
= 330 nF
= 220 nF
= 330 nF
= 330 nF
100 V 20%
100 V 20%
10 V 20%
10 V* 20%
DB
DB2
DBB
= 1N4448
= 1N4448
= 1N4448 (optional)
1
1
1
1
1
1
1
CB2
CVCC
CVEE
CTC
CRC
CHP
CLP
CGG
C1
= 18.7 kΩ
= 15 kΩ
= 105 kΩ
= 32.4kΩ
= 57.6kΩ
= 105kΩ
1%
1%
1%
1%
1%
1%
OVP:
Secondary protection (eg Power Innovations TISP
PBL1 or PBL2). The ground terminals of the
secondary protection should be connected to the
common ground on the Printed Board Assembly
with a track as short and wide as possible,
preferably a groundplane.
100 V 20%
100 V 20%
100 V 20%
63 V 10%
63 V 10%
Depending on CODEC / filter
1
= 604 kΩ
= 604 kΩ
= 249 kΩ
= 280 kΩ
= 332 Ω
= 332 Ω
1%
1%
1%
1%
/
/
/
/
10 W
10 W
10 W
10 W
1
1
1
C2
5% 2 W
5% 2 W
= Line resistor, 40 Ω 1%
*100V if VEE pin connected to VBAT, VBAT2
Figure 13. Single-channel subscriber line interface with PBL 386 11/2 and combination CODEC/filter
DET, to a logic low level when selected.
The loop current detector threshold value,
ILTh, wheretheloopcurrentdetectorchang-
es state, is programmable with the RLD
resistor. RLD connects between pin PLD
and ground and is calculated according to:
Analog Temperature Guard
Loop Monitoring Functions
The widely varying environmental condi- The loop current, ground key and ring trip
tions in which SLICs operate may lead to detectorsreporttheirstatusthroughacom-
the chip temperature limitations being ex- mon output, DET. The status of the detec-
ceeded. The PBL 386 11/2 SLIC reduces tor pin, DET, is selected via the three bit
the dc line current and the longitudinal control interface C1, C2 and C3. Please
current limit when the chip temperature refertosectionControlInputsforadescrip-
reachesapproximately145°Candincreas- tion of the control interface.
es it again automatically when the temper-
500
RLD
=
ILTh
ature drops.
Loop Current Detector
The current detector is internally filtered
and is not influenced by the ac signal at the
two wire side.
The detector output, DET, is forced to a
The loop current detector indicates that the
logic low level when the temperature guard
telephone is off hook and that DC current is
is active.
flowing in the loop by putting the output pin
14
ERICSSON [ ERICSSON ]
