PBL 385 41
11
3
11
3
11
3
(b)
CA
(c)
CA
(a)
RA
RA
CA
RA
(a),(c), (d)
(b),(e)
(a and b)
attn. = RTI//(RTI+RA)
RB
CB
attenuation
no attn. = R
A = 0
3
11
11
11
3
3
(d)
CA
(e)
CA
(f)
CC
RA
CC
RA
RA
big C
A
CA
CB
small C
A
RB
CB
RB
RB
(f)
attn.without dc.
attenuation
attn.without dc.
Figure 11. Possible network types between microphone amplifier and transmitter.
Receiver amplifier
Thereceiveramplifierconsistsofthree
stages, thefirststagebeinganinputbuffer
that renders the input a high impedance.
Thesecondstageisagainregulateddiffe-
rential amplifier and the third stage a
balanced power amplifier. The power
amplifier has a differential output with low
DC- offset voltage, therefore a series
capacitor with the load is normally not
necessary. The receiver amplifier uses at
max. swing 4-6 mA peak. This current is
drawn from the +Line. The driving capa-
cityofthepowerstagecanbeoptimizedby
a resistor at pin 16, an other method is to
connect a resistor in series with the
earphone itself fig.12 b.). The gain and
frequency response is set at the input RI
with a RC-network. The receiver gain can
be regulated. The range of regulation
from the input to the output is 5 ± 2 dB (19
to24dB).Thebalancedearphoneamplifier
can not be loaded to full (both current and
signallevel)singleended.Thesignalwould
be distorded when returned to ground. A
methode is shown in fig.12 d. how to
connect a light load (5k ac. or DC wise) to
the output. It is preferred that both outputs
are loaded the same. The receiver has, as
a principal protection, two series diodes
anti parallel across its output to limit the
signal to the earphone and thus preven-
ting an acoustical shock. A resistor in
series with the output can very well be
usedtoincreasetheprotectionlevel.Note,
that the noise in the receiver is allways
transmitter noise that has been more or
less well balanced out by the side tone
network.
The RC - network (optional) at the
output is to stabilize against the inductive
load that an earphone represents.
(d)
(c)
(a)
PBL 38 5 41
(b)
PBL 38 5 41
PBL 38 5 41
17
17
17
(C)
+
+
+
-
Z
+
+
+
Rx
Rx
Rx
Z
18
18
18
(C)
Z > 5k
The capacitor C is optional
Figure 12. Receiver arrangements.
Gain regulation.
is mainly set by the value of R6 but is also
adjustablewithR2b. IftheDC-characteris-
tics is set according to the line parameters
and a correct value for R6 is chosen the
angleismostlycorrectbutitcanbeadjusted
with R6. The adjustement will affect the
DC-characteristics aswell as most of the
other parameters. This is why the DC-
characteristic is set early in the design
phase.
receiver gain pattern versus line length.
The following will show, what to alter, to
change the look of the curve.
a). Adjustable with the divider R4,R5
for the transmitter and with R12 for the
receiver.
b). The attack point of the regulator is
adjusted with the divider R1,R2a and R2b
to either direction, up or down, on the line
current axis.
Both the receiver and transmitter are
gain regulated (line loss compensated).
Thereisafixeddefaultcompensation
on the chip that can be adjusted or or set
to constant high or low gain mode. The
input impedance at the gain regulation
pin6is5.5k± 20%. Thedefaultregulation
patternisvalidwhentheinputisleftopen.
Fig.13 shows a typical transmitter or
c). The angle of elevation of the curve
8