PBL 3764A/4, /6
1
1
it is possible to increase the maximum
loop resistance at minimum allowable
loop current by reducing the voltage
margin VMargin = |VBat | - VTRMax from the 8V
suggested above. Doing so will, however,
reduce the overload level from 3.1 VPeak
as shown in figure 18. Figure 19 shows
the typical maximum loop resistance at
18mA as a function of the voltage margin
for several values of programmed
Temperature Guard
CDC = T • (
+
), where T = 30ms
RDC1 RDC2
A ring to ground short circuit fault
condition as well as other improper
operating conditions may cause
Note that RDC1 = RDC2 yields minimum
CDC value.
excessive SLIC power dissipation. If
junction temperature increases beyond
150°C, the temperature guard will trigger,
causing the SLIC to be set to a high-
impedance state. In this high-impedance
state, power dissipation is reduced and
the junction temperature will return to a
safe value. Once below 150°C, the SLIC
is returned back to its normal operating
mode and will remain in that state,
assuming the fault condition has been
removed. As long as the temperature
guard is triggered, the loop current
detector will stay in active state.
Case 2: SLIC in the Active State
VTR > VSGRef
In the active state C1 = 0 and C2 = 1. The
saturation guard reference voltage is user
programmable according to:
constant-current feed and VBat = -48 V.
4.9 • 105
(17300) + RSG
VSGRef = 12.9.+
Case 3: SLIC in the Stand-by State.
where:
In the stand-by state C1 = 1 and C2 = 1.
With the SLIC operating in the stand-by,
power saving, state the tip and ring drive
amplifiers are disconnected and a
resistive battery feed is engaged. The
loop current can be calculated from:
RSG
= saturation guard reference
programming resistor in Ω.
VSGRef = saturation guard reference
voltage in volts.
PBL 3764A/4 Long Loop vf
Transmission
Once the dc metallic voltage, VTR,
exceeds the saturation guard reference
voltage, VSGRef the saturation guard
becomes active and the following
expression describes the battery feed
characteristic:
VBat - 3 V
RL + 1800 Ω
ILdc
≈
To ensure that the maximum vf signal
intended to be received/transmitted by the
SLIC will not experience limiting in the
TIPX (pin 27) /RINGX (pin 28) drive
amplifiers at long loops, the saturation
guard must be correctly progammed. The
section, “Battery Feed, Case 2” describes
how to calculate a value for the saturation
guard programming resistor RSG.
where:
ILdc = loop current
RL = loop resistance
VBat = battery supply voltage
16.7 + 4.9 • 105 /(RSG+ 17300)
RL + (RDC1 + RDC2) / 653
VTR = RL •
PBL 3764A/4 Power Dissipation
where RSG, RL and VTR have the same
meaning as described above.
At open loop, i.e. RL → ∞, the saturation
guard limits the tip-ring voltage to:
The short circuit SLIC power dissipation
PShTot is
Loop Monitoring Functions
The loop current, ground key and ring trip
detectors report their status through a
common output, DET (pin 11). The
detector to be connected to DET is
selected via the four bit wide control
interface C1, C2, E0, E1. Please refer to
section Control Inputs for a description of
the control interface.
PShTot = ILSh • ( VBat - ILSh • 2RF) + P3
VTR = 16.7 + (4.9 • 105) / (RSG + 17300)
where:
Figures 14 through 17 illustrate the
PBL 3764A/4 loop feed with VBat = -48V
and VBat = -24V.
For applications where the tip-to-ring
DC voltage, VTR, approaches the VBat
value. RSG should be adjusted as follows:
As a general guideline, adjust RSG in the
VTR expression above to yield
VBat is the battery voltage connected to
the SLIC at pin 10,
RF is the line resistance, 40 Ω
2.5V
ILSh
=
•1000istheconstantloopcurrent.
RDC1 +RDC2
P3 is on-hook, active state power
dissipation (typ. 200 mW @ VBat = -48 V).
Note that a short circuited loop is not a
normal operating condition. The
terminating equipment will add some dc
resistance (200 Ω to 300 Ω) even if the
wire resistance is near 0 Ω.
Loop Current Detector
V
TRMax ≤ |VBat | - 8V at maximum loop
The loop current value at which the loop
current detector changes state is
programmable by selecting the value of
resistor RD. RD connects between pins RD
(22) and VEE (18). Figure 21 shows a
block diagram of the loop current
detector. The two-wire interface produces
a current flowing out of pin RD (22):
IRD = ILTIPX - ILRINGX /600 = IL/300
where ILTIPX and ILRINGX are currents flowing
into the TIPX and RINGX terminals and IL
is the loop current. The voltage generated
by IRD across the programming resistor RD
is compared to an internal reference by a
comparator with hysteresis. The hyste-
resis causes the on-hook to off-hook loop
current detect threshold, ILThOff, to be
slightly larger than the off-hook to on-hook
detector threshold, ILThOn. A logic low
resistance. Maintaining VTR below this
limit ensures vf signal transmission
through the SLIC without clipping.
RSG can be calculated from:
4.9•105
-17300
Figure 20 compares line feed power
dissipation as a function of loop
RSG=
(|VBat|-VMargin)•[1+(RDC+RDC2)/653RL]-16.7V
resistance for three cases: feed resistor
dissipation for a conventional 2 • 400 Ω
resistive feed, PBL 3764A/4 with 30 mA
constant current feed and VBat =-48 V and
PBL 3764A/4 with 30 mA constant current
feed and VBat = -28 V. The diagram
illustrates the significant PBL 3764A/4
power saving compared to the
where:
V
Margin = 8V to allow a maximum overload
level, VTRO, of 3.1V.
If transmission is required at open loop,
i.e., RL → ∞, the above expression
simplifies to:
4.9 • 105
|VBat | - VMargin - 16.7V
-17300
RSG
=
2• 400 Ω feed.
In applications where the longest
possible two-wire loop length is important,
15
ERICSSON [ ERICSSON ]
