Crystal oscillator
Epson Toyocom
SG / HG-8002 series_ Jitter specifications and characteristics chart
PLL-PLL connection
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Because we use a PLL technology, there are a few cases that the jitter value will increase when SG-8002 is connected to another
PLL-oscillator.
In our experience, we are unable to recommend these products for the applications such as telecom carrier use or analog video
clock use. Please be careful checking in advance for these application (Jitter specification is Max.250 ps/CL=15 pF)
Jitter Specifications
Supply
Voltage
Model
Jitter Item
Cycle to cycle
Peak to peak
Specifications
Remarks
150 ps Max.
200 ps Max.
200 ps Max.
250 ps Max.
200 ps Max.
250 ps Max.
33 MHz ≤
1.0 MHz ≤
f
0
≤ 125 MHz, L_CMOS=15 pF
< 33 MHz, L_CMOS=15 pF
≤ 125 MHz, L_CMOS=15 pF
f < 33 MHz, L_CMOS=15 pF
PT / PH
ST / SH
f
33 MHz ≤ f 0
0
5.0 V ±0.5 V
1.0 MHz ≤
Cycle to cycle
Peak to peak
1.0 MHz ≤ f0 ≤ 125 MHz, L_CMOS=15 pF
1.0 MHz ≤ f0
0 ≤ 125 MHz, L_CMOS=15 pF
SC / PC
3.3 V ±0.3 V
Remarks on noise management for power supply line
We do not recommend inserting filters or other devices in the power supply line as the counter measure of EMI noise reduction.
This device insertion might cause high-frequency impedance high in the power supply line and it affects oscillator stable drive.
When this measure is required, please evaluate circuitry and device behavior in the circuit and verify that it will not affect oscillation.
Start up time (0 % VCC to 90 % VCC) of power source should be more than 150 µs.
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SG-8002 series Characteristics chart
Output Rise time (CMOS Level)
Current consumption
(VCC=5.0V)
Symmetry 5.0 V CMOS Level
3.0
50
60
55
25 pF
4.5 V
5.0 V
5.5 V
40
30
20
10
2.5
2.0
3.0 V
3.3 V
3.6 V
15 pF
50
50 pF
2.7 V
45
40
1.5
1.0
0
20 40 60 80 100 120 140
0
20 40 60 80 100 120 140
Frequency(MHz)
Frequency(MHz)
10 15 20 25 30 35 40 45 50 55
Load capacitance (pF)
Output Fall time (CMOS Level)
Disable Current
(VCC=5.0V)
Symmetry 3.3 V CMOS Level
50
60
55
3.0
40
30
20
10
4.5 V
5.0 V
5.5 V
30 pF
3.0 V
3.3 V
3.6 V
2.5
2.0
50
15 pF
2.7 V
45
40
1.5
1.0
0
20 40 60 80 100 120 140
0
20 40 60 80 100 120 140
Frequency(MHz)
Frequency(MHz)
Stand-by Current
Symmetry 5.0V TTL Level
50
10 15 20 25 30 35 40 45 50 55
60
55
Load capacitance (pF)
40
30
20
10
Output Rise time (TTL Level)
25 pF
2.0
15 pF
50
4.5 V
5.0 V
5.5 V
1.5
1.0
45
40
2.5
3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
0
20 40 60 80 100 120 140
Frequency(MHz)
10
15
20
25
30
Load capacitance (pF)
Voltage coefficient [ VCC vs I_dis,I_std ]
Output load vs. Additional Current consumption
20
18
16
14
2.0
1.8
1.6
1.4
Output Fall time (TTL Level)
2.0
1.5
1.0
V
CC=5.0 V
I_dis(Va)=Times(Va)×I_dis(5.0V)
I_std(Va)=Times(Va)×I_std(5.0V)
25 pF
50 pF
12
10
8
6
4
2
1.2
1.0
0.8
0.6
0.4
0.2
15 pF
4.5 V
5.0 V
5.5 V
30 pF
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
0
20 40 60 80 100 120 140
10
15
20
25
30
Frequency(MHz)
Load capacitance (pF)
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