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S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
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Epson Research and Development  
Page 19  
Vancouver Design Center  
4 Look-Up Table (LUT)  
This section discusses programming the S1D13506 Look-Up Table (LUT). Included is a  
summary of the LUT registers, recommendations for color/gray shade LUT values, and  
additional programming considerations. For a discussion of the LUT architecture, refer to  
the S1D13506 Hardware Functional Specification, document number X25B-A-001-xx.  
The S1D13506 is designed with a separate LUT for both the LCD and CRT/TV. Each LUT  
consists of 256 indexed red/green/blue entries. Each LUT entry is four bits wide. The color  
depth determines how many indices are used to output the image to the display. 4 bpp uses  
the first 16 indices, 8 bpp uses all 256 indices, and 15/16 bpp color depths bypass the LUT  
entirely.  
In color modes, the pixel values stored in the display buffer index directly to an RGB value  
stored in the LUT. In monochrome modes, the pixel value indexes into the green  
component of the LUT and the amount of green at that index controls the intensity.  
Monochrome mode look-ups are done based on the Color/Mono Panel Select bit  
(REG[030h] bit 2). The CRT interface receives the RGB values from the LUT even if  
simultaneous display is used with a monochrome panel. Therefore, it is important to  
program the R, G, and B components of the CRT LUT either with a unique set of values,  
or with R, G, and B values all equivalent.  
4.1 Registers  
REG[1E0h] Look-Up Table Mode Register  
n/a n/a n/a  
LUT Mode  
Bit 1  
LUT Mode  
Bit 0  
n/a  
n/a  
n/a  
The S1D13506 is designed with a separate LUT for both the LCD and CRT/TV. The LUT  
Mode register selects which of the LUTs will be accessed by the CPU when reads/writes  
are made to REG[1E2h] and REG[1E4h]. LUT mode selection allows the LUTs to be  
individually written or have identical data written to both LUTs. Individual writes to these  
registers are useful for Epson Independent Simultaneous Display (EISD) modes where  
independent images are displayed on the LCD and the CRT/TV. For further information on  
Epson Independent Simultaneous Display, see the S1D13506 Hardware Functional  
Specification, document number X25B-A-001-xx.  
For normal operation, this register should be set to 00h which will read the LCD LUT and  
write both the LCD and CRT/TV LUTs with identical data. For selection of other LUT  
modes, see REG[1E0h] in the S1D13506 Hardware Functional Specification, document  
number X25B-A-001-xx.  
REG[1E2h] Look-Up Table Address Register  
LUT Address LUT Address LUT Address LUT Address LUT Address LUT Address LUT Address LUT Address  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Programming Notes and Examples  
Issue Date: 01/02/06  
S1D13506  
X25B-G-003-03  
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