EM47FM3288SBA
The calibration control block consists of an analog-to-digital converter (ADC), comparators, a majority filter, an
internal reference voltage generator, and an approximation register. The 240Ω legs in the calibration control
block are matched to the pull-up legs used in the output driver and termination options. The pull-up leg uses a
polyresistor that is slightly larger than 240Ω. It employs several P-channel devices to reduce the resistance of
the legs and to tune the polyresistor to 240Ω. This resistor is used to archive a more linear pull-up and
pull-down curve for improved signal integrity at the system level. The pull-down leg is similar to the pull-up leg.
It uses a large polyresistor with multiple N-channel devices for tuning.
When a ZQ calibration command is given, the pull-up line is driven LOW, and the pullup leg is pulled to VDDQ.
The voltage pull-up (VPULL-UP) line is used to compare the voltage at the XRES point to an internally generated
reference voltage (VDDQ/2) by using the comparator inside the DQ calibration control block. The P-channel
tuning devices are individually tuned using the VOH signals until the voltage at XRES equals the internally
generated reference voltage (VDDQ/2). The VOH codes are stored in the internal approximation register and
sent to each of the pull-up legs of the output drivers and termination. After all the pull-up devices have been
calibrated to the external resistor, the comparator is again used to compare the voltage on the pull-down
(VPULL-DOWN) line to the reference voltage set at VDDQ/2. This process generates the VOL codes and updates
the pull-down devices at the appropriate time, completing the calibration process.
Jul. 2012
14/40
www.eorex.com
EOREX [ EOREX CORPORATION ]
