EM47EM1688SBC
(VDD, VDDQ=1.5V±0.075V)
Symbol
-125
(DDR3-1600)
-150
(DDR3-1333)
Speed Bin
Notes
Units
nCK
CL-nRCD-nRP
Parameter
11-11-11
9-9-9
Min.
1
Max.
Min.
1
Max.
-
Timing of REF command to power-
down entry
20,2
1
-
-
tREFPDEN
tMRSPDEN
Timing of MRS command to power-
down entry
tMOD
tMOD
-
(min)
(min)
Command pass disable delay
1
-
-
1
-
-
nCK
nCK
tCPDED
Timing of ACT command to power-
down entry
1
1
20
20
tACTPDEN
Timing of PRE command to power-
down entry
1
-
-
1
-
-
nCK
nCK
tPRPDEN
tRDPDEN
Timing of RD/RDA command to
power-down entry
RL + 4
+1
RL + 4
+1
RTT turn-on
-225
225
8.5
-250
250
8.5
ps
ns
7
8
tAON
Asynchronous RTT turn-on delay
(Power-down with DLL frozen)
2
2
tAONPD
RTT_Nom and RTT_WR turn-off time
from ODTLoff reference
tCK
(avg)
0.3
2
0.7
8.5
-
0.3
2
0.7
8.5
-
tAOF
tAOFPD
ODTH4
ODTH8
tADC
Asynchronous RTT turn-off delay
(Power-down with DLL frozen)
ns
ODT high time without write command
or with write command and BC4
4
4
nCK
nCK
ODT high time with write command
and BL8
6
-
6
-
tCK
(avg)
RTT dynamic change skew
0.3
0.7
0.3
0.7
Power-up and reset calibration time
Normal operation full calibration time
Normal operation short calibration time
512
256
64
-
-
-
512
256
64
-
-
-
nCK
nCK
nCK
tZQinit
tZQoper
tZQCS
23
3
First DQS pulse rising edge after write
leveling mode is programmed
40
25
-
-
40
25
-
-
nCK
nCK
tWLMRD
DQS./DQS delay after write leveling
mode is programmed
3
tWLDQSEN
RL +
tCCD/2 +
2nCK-W
L
RL + tCCD/2
+
2nCK-WL
Read to write command delay
(BC4MRS, BC4OTF)
-
-
tRTW
RL +
tCCD/2 +
2nCK-W
L
RL + tCCD/2
+
2nCK-WL
Read to write command delay
(BL8MRS, BL8OTF)
-
-
-
-
tRTW
tRAP
Active to read with auto precharge
command delay
tRCD
min
tRCD min
Oct. 2014
20/37
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