EM47EM1688MBB
2. CKE Truth Table
CKE
Command (n)
Current State
n-1
Action (n)
Notes
/RAS, /CAS, /WE, /CS
n
L
L
X
Maintain power down
Power down exit
14,15
Power Down
L
H
L
DESELECT or NOP
X
11,14
L
Maintain self refresh
Self refresh exit
15,16
Self Refresh
L
H
L
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
REFRESH
8,12,16
Bank Active
Reading
H
H
H
H
H
H
H
Active power down entry
Power down entry
Power down entry
Power down entry
11,13,14
11,13,14,17
11,13,14,17
11,13,14,17
L
Writing
L
Precharging
Refreshing
L
L
Precharge power down entry 11
L
Precharge power down entry 11,13,14,18
All Banks Idle
L
Self refresh
9,13,18
10
For more details with all signals, see “Command Truth Table”
Note1. CKE (n) is the logic state of CKE at clock edge n; CKE (n-1) was the state of CKE at the previous clock
edge.
Note2. Current state is defined as the state of the DDR3 SDRAM immediately prior to clock edge n.
Note3. Command (n) is the command registered at clock edge n, and ACTION (n) is a result of Command (n),
ODT is not included here.
Note4. All states and sequences not shown are illegal or reserved unless explicitly described elsewhere in this
document.
Note5. The state of ODT does not affect the states described in this table. The ODT function is not available
during Self-Refresh.
Note6. During any CKE transition (registration of CKE H->L or CKE L->H) the CKE level must be maintained
until 1nCK prior to tCKEmin being satisfied (at which time CKE may transition again).
Note7. DESELECT and NOP are defined in the “Command Truth Table”.
Note8. On self-refresh exit DESELECT or NOP commands must be issued on every clock edge occurring
during the tXS period. Read or ODT commands may be issued only after tXSDLL is satisfied.
Note9. Self-Refresh mode can only be entered from the All Banks Idle state.
Note10. Must be a legal command as defined in the “Command Truth Table”.
Note11. Valid commands for power-down entry and exit are NOP and DESELECT only.
Note12. Valid commands for self-refresh exit are NOP and DESELECT only.
Note13. Self-Refresh can not be entered during Read or Write operations.
Note14. The Power-Down does not perform any refresh operations.
Note15. “X” means “don‟t care“ (including floating around VREF) in Self-Refresh and Power-Down. It also
applies to Address pins.
Note16. VREF (Both VREFDQ and VREFCA) must be maintained during Self-Refresh operation. VREFDQ
supply may be turned OFF and VREFDQ may take any value between VSS and VDD during Self Refresh
operation, provided that VREFDQ is valid and stable prior to CKE going back high and that first write operation
or first write Leveling activity may not occur earlier than 512 nCK after exit from Self Refresh.
Note17. If all banks are closed at the conclusion of the read, write or precharge command, then Precharge
Power-Down is entered, otherwise Active Power-Down is entered.
Note18. „Idle state‟ is defined as all banks are closed (tRP, tDAL, etc. satisfied), no data bursts are in progress,
CKE is high, and all timings from previous operations are satisfied (tMRD, tMOD, tRFC, tZQinit, tZQoper,
tZQCS, etc.) as well as all self-refresh exit and power-down exit parameters are satisfied (tXS, tXP, tXPDLL,
etc).
Oct. 2013
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