EM44CM1688LBB
Pin Description (Continued)
(Data Strobe)
Output with read data, input with write data. Edge-aligned with read
data, centered in write data. LDQS corresponds to the data on
DQ0-DQ7; UDQS corresponds to the data on DQ8-DQ15. The data
strobes LDQS and UDQS may be used in single ended mode or paired
with optional complementary signals /LDQS and /UDQS to provide
differential pair signaling to the system during both reads and writes.
An EMRS(1) control bit enables or disables all complementary data
strobe signals. In this data sheet, "differential DQS signals" refers to
A10 = 0 of EMRS(1) using LDQS/LDQS and UDQS/UDQS.
"single-ended DQS signals" refers to A10 = 1 of EMRS(1) using LDQS
and UDQS.
(Input Data Mask)
B3,F3
UDM,LDM
DM is an input mask signal for write data. Input data is masked when
DM is sampled HIGH coincident with that input data during a Write
access. DM is sampled on both edges of DQS. Although DM pins are
input only, the DM loading matches the DQ and DQS loading.
(Data Input/Output)
DQ0~15
Data inputs and outputs are on the same pin.
B7,A8,F7,E8
UDQS,/UDQS
,
LDQS,/LDQS
G8,G2,H7,H3,
H1,H9,F1,F9,
C8,C2,D7,D3,
D1, D9,B1,B9
A1,E1,J9,M9,
R1/ A3,E3,J3,
N1,P9
A9,C1,C3,C7,
C9,E9,G1,G3,
G7,G9/A7,B2,
B8,D2,D8,E7,
F2,F8,H2,H8
J1/J7
J2
A2,E2,R3,
R7, R8
VDD/VSS
(Power Supply/Ground)
VDD and VSS are power supply for internal circuits.
(DQ Power Supply/DQ Ground)
VDDQ and VSSQ are power supply for the output buffers.
VDDQ/VSSQ
VDDL/VSSDL
VREF
NC
(DLL Power Supply/DLL Ground)
VDDL and VSSDL are power supply for DLL circuits
(Reference Voltage)
SSTL_1.8 reference voltage
(No Connection)
No internal electrical connection is present.
Nov. 2010
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