eorex
EM44AM1684LBC
AC Operating Test Characteristics
(VDD=1.8V 0.1V, TA=0°C ~85°C)
-3
-37
-5
Symbol
Parameter
Units
Min.
-0.45
Max.
+0.45
Min.
-0.5
Max.
Min.
-0.6
Max.
+0.6
DQ output access from
CLK,/CLK
DQS output access time from
CLK,/CLK
tDQCK
+0.5
ns
ns
-0.45
+0.45
tDQSCK
-0.4
+0.4
-0.5
+0.5
tCL,tCH
tCK
CL low/high level width
Clock Cycle Time
0.45
3
0.55
0.45
3.75
0.1
0.55
0.45
5
0.55
tCK
ns
ns
ns
8
-
8
-
8
-
tDS
DQ and DM setup time
DQ and DM hold time
0.1
0.18
0.15
0.28
tDH
-
0.23
-
-
DQ and DM input pulse width
for each input
Data out high impedance time
from CLK,/CLK
Data out low impedance time
from CLK,/CLK
tDIPW
tHZ
0.35
-
-
0.35
-
-
0.35
-
-
tCK
ns
ns
+0.45
+0.45
+0.5
+0.5
+0.6
+0.6
-0.45
tLZ
-0.5
-0.6
DQS-DQ skew for associated
DQ signal
tDQSQ
tQSH
-
-
0.24
0.34
+0.25
-
-
0.3
0.4
-
-
0.35
0.45
+0.25
ns
ns
tCK
Data hold skew factor
Write command to first
latching DQS transition
DQS Low/High input pulse
width
-0.25
-0.25
+0.25
-0.25
tDQSS
tDQSL,tDQSH
0.35
0.2
2
-
-
-
0.35
0.2
2
-
-
-
0.35
0.2
2
-
-
-
tCK
tCK
tCK
tDSL,tDSH DQS input valid window
Mode Register Set command
cycle time
tMRD
tWPRES
tWPRE
tWPST
Write Preamble setup time
Write Preamble
0
-
-
0
-
-
0
-
-
ns
tCK
tCK
0.35
0.4
0.35
0.4
0.35
0.4
Write Postamble
0.6
0.6
0.6
Address/control input setup
time
tIS
0.2
-
0.25
-
0.35
-
ns
Address/control input hold
time
tIH
0.28
0.9
-
0.38
0.9
-
0.48
0.9
-
ns
tRPRE
Read Preamble
1.1
1.1
1.1
tCK
Jul. 2006
www.eorex.com
10/29
EOREX [ EOREX CORPORATION ]
