EN29LV641H/L EN29LV640U
ERASE AND PROGRAM PERFORMANCE
Limits
Max
Parameter
Comments
Unit
Typ
Sector Erase Time
0.5
10
Sec
Sec
µS
Excludes 00h programming prior to
erasure
Chip Erase Time
64
8
Word Programming Time
Accelerated Word Program Time
300
120
5
µS
Excludes system level overhead
Minimum 100K cycles
Chip Programming Time
Erase/Program Endurance
20
60
Sec
100K
Cycles
Note: Typical Conditions are room temperature, 3V and checkboard pattern programmed.
LATCH UP CHARACTERISTICS
Parameter Description
Min
Max
Input voltage with respect to Vss on all pins except I/O pins
(including A9, Reset and OE#)
-1.0 V
12.0 V
Input voltage with respect to Vss on all I/O Pins
VCC Current
-1.0 V
VCC + 1.0 V
100 mA
-100 mA
Note: These are latch up characteristics and the device should never be put under these conditions. Refer to
Absolute Maximum ratings for the actual operating limits.
48-PIN TSOP PACKAGE CAPACITANCE
Parameter Symbol
Parameter Description
Test Setup
= 0
Typ
Max
Unit
C
IN
V
IN
Input Capacitance
6
7.5
pF
C
V
= 0
OUT
OUT
Output Capacitance
8.5
7.5
12
9
pF
pF
C
V
= 0
IN2
IN
Control Pin Capacitance
Note: Test conditions are Temperature = 25°C and f = 1.0 MHz.
DATA RETENTION
Parameter Description
Test Conditions
Min
Unit
150°C
10
Years
Minimum Pattern Data Retention Time
125°C
20
Years
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2005 Eon Silicon Solution, Inc., www.essi.com.tw
42
Rev. B, Issue Date: 2005/06/27
EON [ EON SILICON SOLUTION INC. ]
