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EN29F010-70SIP 参数 Datasheet PDF下载

EN29F010-70SIP图片预览
型号: EN29F010-70SIP
PDF下载: 下载PDF文件 查看货源
内容描述: 1兆位( 128K ×8位), 5V闪存 [1 Megabit (128K x 8-bit) 5V Flash Memory]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 35 页 / 428 K
品牌: EON [ EON SILICON SOLUTION INC. ]
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EN29F010  
USER MODE DEFINITIONS  
Standby Mode  
The EN29F010 has a CMOS-compatible standby mode, which reduces the current to < 1µA (typical).  
It is placed in CMOS-compatible standby when the pin is at VCC ± 0.5. The device also has a  
CE  
TTL-compatible standby mode, which reduces the maximum VCC current to < 1mA. It is placed in  
TTL-compatible standby when the  
pin is at VIH. When in standby modes, the outputs are in a  
CE  
high-impedance state independent of the  
input.  
OE  
Read Mode  
The device is automatically set to reading array data after device power-up. No commands are  
required to retrieve data. The device is also ready to read array data after completing an Embedded  
Program or Embedded Erase algorithm.  
After the device accepts an Erase Suspend command, the device enters the Erase Suspend mode.  
The system can read array data using the standard read timings, except that if it reads at an address  
within erase-suspended sectors, the device outputs status data. After completing a programming  
operation in the Erase Suspend mode, the system may once again read array data with the same  
exception. See “Erase Suspend/Erase Resume Commands” for more information on this mode.  
The system must issue the reset command to re-enable the device for reading array data if DQ5  
goes high, or while in the autoselect mode. See “Reset Command” section.  
See also “Requirements for Reading Array Data” in the “Device Bus Operations” section for more  
information. The Read Operations table provides the read parameters, and Read Operation Timings  
diagram shows the timing diagram.  
Output Disable Mode  
When the  
pin is at a logic high level (VIH), the output from the EN29F010 is disabled. The  
OE  
output pins are placed in a high impedance state.  
Auto Select Identification Mode  
The autoselect mode provides manufacturer and device identification, and sector protection  
verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for  
programming equipment to automatically match a device to be programmed with its corresponding  
programming algorithm. However, the autoselect codes can also be accessed in-system through the  
command register.  
When using programming equipment, the autoselect mode requires VID (10.5 V to 11.5 V) on  
address pin A9. Address pins A6, A1, and A0 must be as shown in Autoselect Codes (High Voltage  
Method) table. In addition, when verifying sector protection, the sector address must appear on the  
appropriate highest order address bits. Refer to the corresponding Sector Address Tables. The  
Command Definitions table shows the remaining address bits that are don’t care. When all  
necessary bits have been set as required, the programming equipment may then read the  
corresponding identifier code on DQ7–DQ0.  
To access the autoselect codes in-system; the host system can issue the autoselect command via  
the command register, as shown in the Command Definitions table. This method does not require  
VID. See “Command Definitions” for details on using the autoselect mode.  
This Data Sheet may be revised by subsequent versions  
©2003 Eon Silicon Solution, Inc., www.essi.com.tw  
Rev. A, Issue Date: 2003/10/20  
6
or modifications due to changes in technical specifications.  
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