EN25S20
Revisions List
Revision No Description
Date
A
Preliminary version
2009/01/12
1. Update Page program, Sector, Block and Chip erase time (typ.)
parameter on page 1 and 28.
(1). Page program: from 1.5ms to 1.3m
(2). Sector erase: from 0.15s to 0.09s
(3). Block erase: from 0.8s to 0.5s
(4). Chip erase: from 3s to 1.8s.
2. Add the description of OTP erase command on page 10 and page 25.
3. Remove Quad mode spec. from version A.
4. Correction typo for OTP 512 to 256 byte and mapping to sector from
1023 to 63 on page 25.
B
2009/05/15
5. Modify V test condition and Max value to 0.3V in table 9 on page 27
OL
6. Modify some parameter values in Table 11 on page 28.
(1). Correction typo tCH and tCL
(2). Modify fR from 50 to 33MHz
(3). Modify tW from Typ 10ms and Max 15ms to Typ 20ms and
Max to 50ms
7. Correction typo X = 8-pin VDFN (2x3mm) and
20 = 2 Megabit (256K x 8) on page 35
Remove 3Bh, BBh functions and relevant descriptions.
Add the VDFN 8 (5x6mm) package option.
1. Update DC Characteristics in Table 9 on page 24.
(1). Icc3 (Read) from 14mA to 12mA for 75MHz
Icc3 (Read) from 11mA to 9mA for 33MHz
(2). Icc4 (PP) from 15mA to 22mA.
C
D
2009/09/08
2009/11/24
(3). Icc5 (WRSR) from 15mA to 22mA
(4). Icc6 (SE) from 15mA to 22mA
(5). Icc7 (BE) from 15mA to 22mA
E
2010/04/13
(6). VIL from 0.2Vcc to 0.3Vcc (max.)
2. Update AC Characteristics in Table 11 on page 25.
(1). TCLQV from 8ns to 11ns (max.).
(2). TW from 20ms / 50ms to 10ms / 15ms (typ. / max.)
(3). Page Program time from 1.3ms to 1.5ms (typ.)
(4). Chip Erase time from 1.8s to 2s (typ.)
Update AC Characteristics in Table 11 on page 25.
F
2010/07/29
(1)tCLQV from 11ns to 9ns (max.).
G
H
Remove the package option of 8-pin VDFN (2x3mm).
Add 8-pin USON (2x3 mm) package option.
2011/06/14
2011/11/07
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.eonssi.com
34
Rev. H, Issue Date: 2011/11/07
EON [ EON SILICON SOLUTION INC. ]
