EN25Q16A
Table 11. AC Characteristics
(Ta = - 40°C to 85°C; VCC = 2.7-3.6V)
Symbol
Alt
Parameter
Min
D.C.
Typ
Max
Unit
MHz
Serial Clock Frequency for:
FAST_READ, PP, SE, BE, DP, RES, WREN,
WRDI, WRSR
Serial Clock Frequency for:
RDSR, RDID, Dual Fast Read, Dual I/O and
Quad I/O Fast Read
104
FR
fC
D.C.
80
50
MHz
fR
Serial Clock Frequency for READ
Serial Clock High Time
D.C.
4
MHz
ns
1
tCH
1
tCL
Serial Clock Low Time
4
ns
2
tCLCH
Serial Clock Rise Time (Slew Rate)
Serial Clock Fall Time (Slew Rate)
CS# Active Setup Time
0.1
0.1
5
V / ns
V / ns
ns
2
tCHCL
tSLCH
tCHSH
tSHCH
tCHSL
tCSS
CS# Active Hold Time
5
ns
CS# Not Active Setup Time
CS# Not Active Hold Time
5
ns
5
ns
CS# High Time for read
CS# High Time for program/erase
15
50
ns
ns
tSHSL
tCSH
2
tDIS
tHO
tDSU
tDH
tV
tSHQZ
Output Disable Time
6
8
ns
ns
ns
ns
ns
ns
ns
µs
tCLQX
tDVCH
tCHDX
tCLQV
Output Hold Time
0
2
5
Data In Setup Time
Data In Hold Time
Output Valid from CLK
3
tWHSL
Write Protect Setup Time before CS# Low
Write Protect Hold Time after CS# High
CS# High to Deep Power-down Mode
20
3
tSHWL
100
2
tDP
3
3
CS# High to Standby Mode without Electronic
Signature read
2
tRES1
µs
µs
CS# High to Standby Mode with Electronic
Signature read
2
tRES2
1.8
tW
Write Status Register Cycle Time
Page Programming Time
Sector Erase Time
15
50
5
ms
ms
s
tPP
tSE
tBE
tCE
1.3
0.06
0.4
12
0.3
2
Block Erase Time
s
30
28
0
s
Chip Erase Time
WIP = write operation
Software Reset
µs
µs
tSR
Latency
WIP = not in write operation
Note: 1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write status Register instruction when Status Register Protect Bit is set at 1
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
www.eonssi.com
43
Rev. E, Issue Date: 2011/07/14
EON [ EON SILICON SOLUTION INC. ]
