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EN25F05-100WIP 参数 Datasheet PDF下载

EN25F05-100WIP图片预览
型号: EN25F05-100WIP
PDF下载: 下载PDF文件 查看货源
内容描述: 512 Kbit的串行闪存与4KB的部门统一 [512 Kbit Serial Flash Memory with 4Kbytes Uniform Sector]
分类和应用: 闪存
文件页数/大小: 32 页 / 1230 K
品牌: EON [ EON SILICON SOLUTION INC. ]
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EN25F05  
time duration of t  
RES1  
(See AC Characteristics) the device will resume normal operation and other  
instructions will be accepted. The CS# pin must remain high during the t  
time duration.  
RES1  
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by  
driving the CS# pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device  
ID bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in  
Figure 17. The Device ID value for the EN25F05 are listed in Table 5. The Device ID can be read  
continuously. The instruction is completed by driving CS# high.  
When Chip Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device was  
not previously in the Deep Power-down mode, the transition to the Stand-by Power mode is immediate.  
If the device was previously in the Deep Power-down mode, though, the transition to the Standby Power  
mode is delayed by t  
, and Chip Select (CS#) must remain High for at least t  
(max), as  
RES2  
RES2  
specified in Table 11. Once in the Stand-by Power mode, the device waits to be selected, so that it can  
receive, decode and execute instructions.  
Except while an Erase, Program or Write Status Register cycle is in progress, the Release from Deep  
Power-down and Read Device ID (RDI) instruction always provides access to the 8bit Device ID of the  
device, and can be applied even if the Deep Power-down mode has not been entered.  
Any Release from Deep Power-down and Read Device ID (RDI) instruction while an Erase, Program or  
Write Status Register cycle is in progress, is not decoded, and has no effect on the cycle that is in  
progress.  
Figure 16. Release Power-down Instruction Sequence Diagram  
Figure 17. Release Power-down / Device ID Instruction Sequence Diagram  
This Data Sheet may be revised by subsequent versions  
or modifications due to changes in technical specifications.  
©2004 Eon Silicon Solution, Inc.,  
www.eonssi.com  
19  
Rev. D, Issue Date: 2010/04/15  
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