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EM6324LZSP5B2.6 参数 Datasheet PDF下载

EM6324LZSP5B2.6图片预览
型号: EM6324LZSP5B2.6
PDF下载: 下载PDF文件 查看货源
内容描述: 复位电路,带有手动复位和看门狗 [Reset Circuit with Manual Reset and Watchdog]
分类和应用: 复位电路
文件页数/大小: 10 页 / 501 K
品牌: EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
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EM6323/24  
Electrical Characteristics (continued)  
Unless otherwise specified: VDD= 0.9V to 5.5V, TA=-40°C to +125° C (note 1).  
Parameter  
Symbol  
Conditions  
Min  
-
Typ  
2.1%VTH  
200  
Max  
-
Unit  
Threshold hysteresis  
VHYS  
TA=+25°C  
V
EM6323/24 C-G-L-Q  
160  
0.7  
20  
240  
3.8  
30  
V
DD from 0V to VTH (typ)+15%  
EM6323/24 A-E-J-N  
EM6323/24 B-F-K-P  
1.56  
Reset timeout period  
tPOR  
TA= +25°C  
(note 2 and 4)  
ms  
25  
EM6323/24 D-H-M-R 1280  
1600  
1920  
Propagation delay time  
VDD drops from VTH (typ)+0.2V to VTH (typ)-0.2V  
(note 2). TA= +25°C  
tP  
2
70  
255  
µs  
V
DD to RESET (RESET)  
delay  
VDD>1V  
-
-
-
-
-
-
-
-
-
-
-
-
0.3  
0.3  
0.35  
0.3  
0.3  
0.35  
-
I
OL=100µA  
Open-drain RESET output  
Voltage  
VOL  
V
VDD>2.5V  
VDD>5V  
IOL=1.5mA  
IOL=3mA  
-
VDD>1V  
-
I
OL=100µA  
VOL  
VDD>2.5V  
VDD>5V  
IOL=1.5mA  
IOL=3mA  
-
-
Push-pull RESET / RESET  
Output voltage  
V
VDD>1.1V  
VDD>2.5V  
VDD>5V  
0.8  
2
4
-
I
OH=-30µA  
VOH  
IOH=-1.5mA  
IOH=-3mA  
-
-
Output leakage current  
WATCHDOG INPUT (WDI)  
WDI Input low  
ILEAK  
Only for EM6323/24_Y (open-drain)  
TA= +25°C  
0.5  
µ
A
VWDI low  
VWDI high  
tWP  
-
-
-
0.3  
VDD  
V
V
WDI Input high  
0.7  
VDD  
-
Pulse width at WDI  
1
-
-
1920  
7.5  
120  
30720  
-
µ
s
EM6323/24 J-K-L-M  
1280  
5
1600  
6.25  
100  
25600  
18  
EM6323/24 A-B-C-D  
EM6323/24 E-F-G-H  
Watchdog timeout period  
tWD  
(note 6)  
ms  
80  
EM6323/24 N-P-Q-R 20480  
High-level Input Current  
Low-level Input Current  
IIH  
IIL  
WDI connected to VDD, TA= +25°C  
WDI connected to GND, TA= +25°C  
-
-
µ
A
A
8.3  
-
µ
MANUAL RESET ( MR ) – EM6323 only  
VMRT low  
VMRT high  
tMD  
-
-
-
0.3  
VDD  
-
V
MR Input low  
0.7  
VDD  
V
MR Input high  
TA= +25°C  
-
0.3  
-
-
-
µs  
MR to Reset delay  
Pulse width at MR (note 5)  
tPMD  
1
7
µs  
MR Internal Pull-up  
resistor  
RMR  
TA=-40°C to +125°C  
30  
74  
k
Note 1: Production tested at +25°C only. Over temperature limits are guaranteed by design, not production tested.  
Note 2: WDI, MR and RESET (RESET) open.  
Note 3: Threshold voltage is specified for VDD falling.  
Note 4: Standard version for tPOR is 200ms (typ). Other option (1.6ms, 25ms, 1600ms) are available by mask option and  
upon minimum order quantity. Please contact EM sales.  
Note 5: Pulse width must be greater than 1µs to ensure the RESET (RESET) to go active.  
Note 6: Standard version for tWD is 1600ms (typ). Other option (6.2ms, 102ms, 25.6s) are available by mask option and  
upon minimum order quantity. Please contact EM sales.  
4
www.emmicroelectronic.com  
Copyright © 2006, EM Microelectronic-Marin SA  
03/06 - rev.H  
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