EM4205-EM4305
Block Diagram
Clock
Extractor
EEPROM
Data
Extractor
Logic
Modulator
VDD
COIL1
Reset
Power
Supply
Power on
Reset
CR
Cbuf
COIL2
VSS
Figure 4
Functional Description
VDD
The IC builds its power supply through an integrated
rectifier. When it is placed in a magnetic field the DC
internal voltage starts to increase.
VPOR
Hysteresis
As long as the power supply is lower than the power on
reset (POR) threshold, the circuit is in reset mode to
prevent unreliable operation. In this mode, the modulator
is switched off.
t
Reset
After the supply voltage crosses the POR threshold, the
circuit reads configuration word and then enters in default
read mode according to configuration just read. During the
configuration word readout, the modulator switch is also
off.
EM4305
Active
t
While the IC is operating in Default Read mode, it checks
the coil signal to detect eventual command from reader. In
the case the reader field stops for a period much longer
than TMONO, it interrupts read mode and expects reader to
send the command. If a valid command pattern is
detected then the command is executed. After execution
of command the chip returns to default read mode.
Figure 5
Clock Extractor
The Clock Extractor generates a system clock with a
frequency corresponding to the frequency of the RF field
(fRF). The system clock is used by a sequencer to
generate all internal timings.
Block Description
Data Extractor
The transceiver generated field is amplitude modulated
(field stops) to transmit data to the EM4205/4305. The
Data Extractor detects absence of extracted clocks for
Power Supply
This block integrates an AC/DC converter, which extracts
the DC power from the incident RF field. It also acts as a
limiter, which clamps the voltage on the coil terminals to
avoid chip destruction in strong RF fields.
periods longer than TMONO
.
Modulator
The Data Modulator is driven by Logic. When the
Modulator is switched ON, it draws a large current from
the coil terminals, thus amplitude modulating the RF field.
Power On Reset (POR)
When the EM4205/4305 with its attached coil enters the
electromagnetic field, the built in AC/DC converter
supplies voltage to the chip. The DC voltage is monitored
and a Reset signal is generated to initialize the logic. The
Power On Reset is also provided in order to make sure
that the chip will start issuing correct data.
Logic
Logic is composed of several sub-blocks, which are
described in the following text.
Hysteresis is provided to avoid improper operation at the
limit level.
4
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Copyright 2013, EM Microelectronic-Marin SA
4205-4305-DS-01.doc, Version 4.0, 22-Oct-13
EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
