EM4069
EM4169
Modulation of Magnetic Field
The modulation envelope of the magnetic field induced by the reader is observed by the EM4069 as shown in the following
figure.
Synchronization pattern
tS1 tS2
SB
B0
B1
B2
tRDB
B3
B4
B5
B6
B7
tS3
Fig. 12
Comment to above timings:
S1 : at least 4 samples of peak detector have to be HIGH. In worst case the distance between samples can be 2 bit periods.
t
tS2
:
at least one sample LOW. 2 bit periods + some security since the IC and R/W unit are not synchronized. Duration of 3 bit
periods is suggested.
tS3
:
one sample high to enter Command Processing state defines lower limit. Watchdog timer defines higher limit (8 bits
periods) Please note that during this time the Modulator load is permanently on so this is the worst case for Power Supply
level. So using shorter times than upper limit is advised. Duration of 3 bit periods is suggested.
Refer to table 4 for timings range.
In the above example, the Read ROM command (1010 0101) is sent.
After successful 8-bit command detection, the EM4069 will output continuously the ROM contents
.
Reset, Read ROM and Read Configuration Word
commands
The IC treats the Write command as follows:
First byte received is treated in the same way as for an 8-
bit command. In the case that the processing of the first
byte detects a Write Word command, it first puts the
modulator load OFF for 1/2 bit period. During this time, the
antenna field is High (as stop bit is at logic one) so the
internal power supply capacitor can be charged. Next the
EM4069 transitions to Start Bit Detection State with
modulator load ON and waits for start bit at logic 0. The
time out value is 2 tRDB. If time out is reached before a start
bit is detected, the IC then returns to the read mode.
Normally the start bit comes already after 1 tRDB and the
EM4069 then continues to process the next byte.
After detecting these commands the IC returns in read
mode and starts reading corresponding block (EEPROM or
ROM).
Write Word and Write Configuration Word
commands
For Write commands, a total of 32 significant bits have to
be transferred from reader to EM4069. The 32 bits are
transferred in a sequence of 4 bytes. Each byte is headed
with start bit at logic 0 (as in normal 8-bit command) and
trailed with stop bit at logic 1. The antenna sends an
uninterrupted sequence of 40 bits (32 command bits, 4
start bits and 4 stop bits).
After the fourth byte has been detected, the EM4069
verifies if the CRC check is OK and if the word, which is
addressed for writing, is not protected by the configuration
word. Next, power check is performed to determine
whether there is enough power available to write
EEPROM. This operation lasts 1.5-bit periods. In the case
all conditions above are fulfilled (CRC, protection, power
check) EEPROM is written. If one of the conditions fails,
the EM4069 returns in read mode without writing
EEPROM.
This data organization ensures re-synchronization of the
EM4069 with the reader signal, and avoids that wrong data
would be extracted due to missing or spurious clocks from
the clock-extractor of the IC.
10
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