R
EM3027
D6
D2
D1 D0 ACK
A5
A1
A0 R/W ACK D7
A6
SDA
Data Byte, send/receive as
many as needed
Slave Address
Read/Write selection bit
1
2
1
2
9
6
7
8
9
6
7
8
SCL
Stop Condition
Start Condition
Figure 2: I2C Communication
Noise suppression circuitry is implemented rejecting spikes shorter than 50ns on SCL and SDA bus lines.
7.2
How to perform data transmission through SPI
The SPI interface connects master and slave circuits.
During a WRITE transmission, the master defines the
register address and sends then data bytes, using the
auto-increment of the lower address part (bit 2 to 0)
within the EM3027.
4 connections are used: CS = Chip Select, SCK = Serial
Clock, SI = Serial Data Input and SO = Serial Data
Output.
SPI is a byte oriented protocol with MSB first mode. Data
are changing on SCK falling edge and sampled on rising
edge.
The page address is fixed until a new transmission is
started.
SO data output of EM3027 is in Hi-Z state during the
WRITE transmission.
A transmission is started by the master by rising the CS
input of the selected slave to ‘1’. The transmission is
terminated by the master by putting ‘0’ level the CS input.
If READ transmission is initiated, data are output after
the address byte by the EM3027.
The first bit is the R/W bit, R/W = ‘0’ means a WRITE
transmission, where the master sends the data via the SI
line. R/W = ‘1’ defines a READ transmission, where the
slave outputs the data on the SO line.
The lower part of the address (bit 2 to 0) is automatically
incremented after each data byte. The page address is
not changed until a new transmission is started.
The following 7 bits of the first byte form the address of
the register in the EM3027, where the data are written or
read. (MSB is first bit at position 2 in this address byte.)
The not transmitted 8th bit of the register address is set
internally to ‘0’.
SO is in Hi-Z while the address byte is sent. During data
output by SO, the SI input has no influence.
When CS is at ‘0’ level, SO is Hi-Z and SCK, SI can be
left floating.
In the EM3027, the upper 5 bits of an address form a
“page address”, the 3 lower bits are an auto-incrementing
sub-address. The “page-addres’’ is defined by a WRITE
transmission. During a transmission, the 3 lower address
bits are incremented internally after each byte.
SO and SI can be connected together to form a 3-wire
interface with CS, SCK and Serial Data Input/Output.
The EM3027 works as slave. The CS input has a pull-
down resistor of 100 kΩ.
Copyright © 2009, EM Microelectronic-Marin SA
12/09 – rev D
www.emmicroelectronic.com
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