R
EM3027
8.7
EEPROM memory
Before any EEPROM access (read/write), the bit EERefOn has to be cleared by the application to prevent from access
collision with the Configuration Registers.
Then the application has to read EEBusy bit and if EEBusy = ‘0’, then EEPROM access can be started.
After the write command (at “Transmission STOP”) the current state of EEPROM writing is monitored by EEBusy register bit
at ‘1’. EEBusy goes to ‘0’ when EEPROM writing is finished.
NOTE: VCC must be applied during the whole EEPROM write (i.e. until EEBusy = ‘0’) and must be higher than Vprog
.
Clear EERefOn
Clear EERefOn
No
No
EEBusy = 0 ?
EEBusy = 0 ?
Yes
Yes
Write EEPROM
Read EEPROM
Yes
No
EEBusy = 0 ?
Yes
Next read ?
No
Set EERefOn
Yes
Next Write ?
No
Set EERefOn
8.7.1
EEPROM Control Page
This part is composed of 4 bytes purposed for miscellaneous function control and for crystal compensation constants.
EEctrl byte contains: trickle charger selectors (R80k, R20k, R5k, R1.5k); output clock frequency selector (FD1, FD0);
thermometer enable and thermometer period selector.
8.7.2
Clock Output
Output clock frequency is selected by FD1, FD0 bits in EEctrl register.
FD1
0
FD0
0
Select Clock Output
Description
From crystal oscillator, without
32.768 kHz
frequency compensation
0
1
1
1
0
1
1024 Hz
32 Hz
1 Hz
With frequency compensation
Table 12: Output Clock frequency selection
Copyright © 2009, EM Microelectronic-Marin SA
12/09 – rev D
www.emmicroelectronic.com
17
EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
