A6250
Pin Description
Pin
2
3
4
5
12
13
14
15
Name
EN
RES
TCL
V
SS
INPUT
OUTPUT
R
V
IN
Function
Push-pull active low enable output
Open drain active low reset output.
RES must be pulled up to V
OUTPUT
even if unused
Watchdog timer clear input signal
GND terminal
Voltage regulator input
Voltage regulator output
R
EXT
input for RC oscillator tuning
Voltage comparator input
assumes a constant load (ie.
≥
100 s). The transient ther-
mal resistance for a single pulse is much lower than the
continuous value.
Table 5
Functional Description
Voltage Regulator
The A6250 has a 5 V ± 3%, 250 mA, low dropout voltage
regulator. The low supply current (typ. 175 µA) makes the
A6250 particularly suited to automotive systems then re-
main energized 24 hours a day. The input voltage range is
2.3 V to 40 V for operation and the input protection in-
cludes both reverse battery (20 V below ground) and load
dump (positive transients up to 60 V). There is no reverse
current flow from the OUTPUT to the INPUT when the
INPUT equals V
SS
. This feature is important for systems
which need to implement (with capacitance) a minimum
power supply hold-up time in the event of power failure. To
achieve good load regulation a 22 µF capacitor (or
greater) is needed on the INPUT (see Fig. 8). Tantalum or
aluminium electrolytics are adequate for the 22 µF capaci-
tor; film types will work but are relatively expensive. Many
aluminium electrolytics have electrolytes that freeze at
about -30°C, so tantalums are recommended for opera-
tion below -25°C. The important parameters of the 22 µF
capacitor are an effective series resistance of
≤
5
Ω
and a
resonant frequency above 500 kHz.
A 10 µF capacitor (or greater) and a 100 nF capacitor are
required on the OUTPUT to prevent oscillations due to in-
stability. The specification of the 10 µF capacitor is as per
the 22 µF capacitor on the INPUT (see previous para-
graph).
The A6250 will remain stable and in regulation with no ex-
ternal load and the dropout voltage is typically constant as
the input voltage fall to below its minimum level (see Table
2). These features are especially important in CMOS RAM
keep-alive applications.
Care must be taken not to exceed the maximum junction
temperature (+125°C). The power dissipation within the
A6250 is given by the formula:
P
TOTAL
= (V
INPUT
- V
OUTPUT
) . I
OUTPUT
+ (V
INPUT
) . I
SS
The maximum continuous power dissipation at a given
temperature can be calculated using the formula:
P
MAX
= (125°C - T
A
) / Rth(j-a)
where Rth(j-a) is the thermal resistance from the junction
to the ambient and is specified in Table 2. Note the R
th(j-a)
given in Table 2 assumes that the package is soldered to a
PCB. The above formula for maximum power dissipation
6
V
IN
Monitoring
The power-on reset and the power-down reset are gener-
ated as a response to the external voltage level on the V
IN
input. The external voltage level is typically obtained from
a voltage divider as shown in Fig. 8. The user uses the ex-
ternal voltage divider to set the desired threshold level for
power-on reset and power-down reset in his system. The
internal comparator reference voltage is typically 1.52 V.
At power-up the reset output (RES) is held low (see Fig. 4).
After INPUT reaches 3.36 V (and so OUTPUT reaches at
least 3 V) and V
IN
becomes greater than V
REF
, the RES out-
put is held low for an additional power-on-reset (POR) de-
lay which is equal to the watchdog time T
WD
(typically 100
ms with an external resistor of 123 kΩ connected at R pin).
The POR delay prevents repeated toggling of RES even if
V
IN
and the INPUT voltage drops out and recovers. The
POR delay allows the microprocessor’s crystal oscillator
time to start and stabilize and ensures correct recognition
of the reset signal to the microprocessor.
The RES output goes active low generating the
power-down reset whenever V
IN
falls below V
REF
. The sen-
sitivity or reaction time of the internal comparator to the
voltage level on V
IN
is typically 5 µs.
Timer Programming
The on-chip oscillator with an external resistor R
EXT
con-
nected between the R pin and V
SS
(see Fig. 8) allows the
user to adjust the power-on reset (POR) delay, watchdog
time T
WD
and with this also the closed and open time win-
dows as well as the watchdog reset pulse width (T
WD
/ 40).
With R
EXT
= 123 kΩ typical values are:
- Power-on reset delay: T
POR
= 100 ms
- Watchdog time:
T
WD
= 100 ms
- Closed window:
T
CW
= 80 ms
- Open window:
T
OW
= 40 ms
- Watchdog reset:
T
WDR
= 2.5 ms
Note the current consumption increases as the frequency
increases.
EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
