R
A3024
Absolute Maximum Ratings
or electric fields; however, it is advised that normal precautions
must be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur when all
terminal voltages are kept within the supply voltage range.
Unused inputs must always be tied to a defined logic voltage
level.
Parameter
Symbol Conditions
Maximum voltage at VDD
VDDmax
Vmax
VSS + 7.0V
VDD + 0.3V
VSS - 0.3V
+125OC
Max. voltage at remaining pins
Min. voltage on all pins
Vmin
Maximum storage temperature
Minimum storage temperature
Maximum electrostatic discharge
to MIL-STD-883C method 3015
Maximum soldering conditions
TSTOmax
TSTOmin
Operating Conditions
-55OC
Parameter
Symbol Min. Typ. Max. Units
VSmax
TSmax
1000V
250OC x 10s
TA
-40
2.0
+85
5.5
OC
Operating temperature
Logic supply voltage
Supply voltage dv/dt
(power-up & down)
Decoupling capacitor
Crystal Characteristics
Frequency
5.0
VDD
V
Table 1
6
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond specified
operating conditions may affect device reliability or cause
malfunction.
dv/dt
V/ms
100
nF
32.768
f
kHz
pF
7
8.2 12.5
Load Capacitance
Series resistance
CL
RS
Handling Procedures
This device has built-in protection against high static voltages
35
50
kW
Table 2
Electrical Characteristics
VDD = 5.0V 10%, VSS = 0 V, TA = -40 to +85OC, unless otherwise specified
Parameter
Standby current1)
Min.
Typ.
Max.
Units
Symbol Test Conditions
VDD = 3 V, PF = 0
IDD
VDD = 5 V, PF = 0
1.2
2
10
15
mA
mA
Dynamic current2)
IDD
1.5
mA
CS = 4 MHz, RD = VSS
,
WR = VDD
IRQ (open drain)
Output low voltage
Output low voltage
VOL
VOL
IOL = 8 mA
IOH = 1 mA, VDD = 2 V
0.4
0.4
V
V
Inputs and Outputs
Input logic low
Input logic high
VIL
TA = +250C
TA = +250C
IOL = 6 mA
IOH = 6 mA
0.2 × VDD
V
V
VIH
VOL
VOH
VPFL
VH
0.8 × VDD
0.4
Output logic low
Output logic high
PF activation voltage
PF hysteresis
V
2.4
V
0.5 × VDD
100
V
mV
TA = +250C
VILS = 0.8 V
VSS<VIN<VDD
CS = 1
ILS
Pullup on SYNC
mA
nA
nA
20
2
Input leakage
IIN
10
10
1000
1000
Output tri-state leakage
Oscillator Characteristics
Starting voltage
ITS
TA ³ +25OC
V
V
s
VSTA
VSTA
TSTA
2.5
1
Start-up time
Frequency Characteristics
Frequency tolerance
Frequency stability
Temperature stability
Df/f
fsta
TA = +25OC addr. 10 hex = 00 hex
2104)
1
251
5
ppm
ppm/V
ppm
3)
2.0 £ VDD £ 5.5 V
addr. 10 hex = 00 hex
tsta
see Fig. 5
1)
Table 3
With PFO = 0 (VSS) all I/O pads can be tri-state, tested.
With PFO = 1 (VDD), CS = 1 (VDD) and all other I/O pads fixed to VDD or to VSS: same standby current, not tested.
All other inputs to VDD and all outputs open.
2)
3)
4)
At a given temperature.
See Fig. 4
2
EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
