ePVP6800
VFD Controller
7.2.13 RC (PORTC I/O Data , Counter5 Data)
a) PAGE 0 I/O Data Buffer/Serial Signal
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
PC3
R/W
Bit 2
PC2
R/W
Bit 1
PC1
R/W
Bit 0
PC0
R/W
-
-
-
-
-
-
-
-
Bit 0 ~ Bit 3 :1. PC0 ~ PC3 are defined as Input/Output
2. KEY1 ~ KEY4 are defined as Keyscan Input
b) PAGE 1 (PORTC, Pull High)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
PHC3
R/W-0
Bit 2
PHC2
R/W-0
Bit 1
PHC1
R/W-0
Bit 0
PHC0
R/W-0
-
-
-
-
-
-
-
-
Bit 0 ~ Bit 3 (PHC0 ~ PHC3) : PORTC Bit0 ~ Bit3 pull high control register
0 ꢂdisable pull high function.
1 ꢂenable pull high function
d) PAGE 2 (Counter5 Data Register)
Bit 7
CN57
R/W-0
Bit 6
CN56
R/W-0
Bit 5
CN55
R/W-0
Bit 4
CN54
R/W-0
Bit 3
CN53
R/W-0
Bit 2
CN52
R/W-0
Bit 1
CN51
R/W-0
Bit 0
CN50
R/W-0
Bit 0 ~ Bit 7 (CN50 ~ CN57) : Counter5 buffer that you can read and write.
Counter5 is an 8-bit up-counter with 8-bit prescaler that allows you to
use RC PAGE2 to preset and read the counter (write ꢂpreset). After
an interruption, it will reload the preset value.
7.2.14 RD (Interrupt Flag,)
a) PAGE 0 (Interrupt Flags Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
CNT5
R/W-0
Bit 1
CNT4
R/W-0
Bit 0
CNT3
R/W-0
-
-
-
-
-
-
-
-
-
-
NOTE: "1" means interrupt request, "0" means non-interrupt
Bit 0 (CNT3) : Counter3 timer overflow interrupt flag. Set when counter3 timer overflows.
Bit 1 (CNT4) : Counter4 timer overflow interrupt flag. Set when counter4 timer overflows.
Bit 2 (CNT5) : Counter5 timer overflow interrupt flag. Set when counter5 timer overflows.
16 of 47 11. 28.2004 (V1.23)
This specification is subject to change without further notice.
ELAN [ ELAN MICROELECTRONICS CORP ]
