EM78P809N
8-Bit Microcontroller
Binary Instruction
Hex
Mnemonic
NOP
Operation
Status Affected
0
0
0
0
0
0
0
0
0
0000 0000 0000
0000 0000 0001
0000 0000 0010
0000 0000 0011
0000 0000 0100
0000
0001
0002
0003
0004
000r
0010
0011
0012
No Operation
Decimal Adjust A
A → CONT
None
C
None
T,P
T,P
DAA
CONTW
SLEP
WDTC
IOW
0 → WDT, Stop oscillator
0 → WDT
0000 0000
rrrr
R
A → IOCR
None <Note1>
None
0000 0001 0000
0000 0001 0001
0000 0001 0010
ENI
DISI
RET
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC,
Enable Interrupt
CONT → A
None
None
0
0000 0001 0011
0013
RETI
None
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000 0001 0100
0000 0001
0000 01rr
0014
001r
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
05rr
05rr
05rr
05rr
CONTR
IOR
None
None <Note1>
rrrr
rrrr
R
IOCR → A
A → R
0 → A
0 → R
R-A → A
R-A → R
R-1 → A
R-1 → R
A ∨ R → A
A ∨ R → R
A & R → A
A & R → R
A ⊕ R → A
A ⊕ R → R
A + R → A
A + R → R
R → A
MOV
CLRA
CLR
SUB
SUB
DECA
DEC
OR
R,
A
None
Z
Z
Z,C,DC
Z,C,DC
0000 1000 0000
0000 11rr
0001 00rr
0001 01rr
0001 10rr
0001 11rr
0010 00rr
0010 01rr
0010 10rr
0010 11rr
0011 00rr
0011 01rr
0011 10rr
0011 11rr
0100 00rr
0100 01rr
0100 10rr
0100 11rr
0101 00rr
0101 01rr
0101 10rr
0101 11rr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
R
A,
R,
R
R
A
Z
Z
Z
Z
Z
Z
Z
Z
R
A,
R,
A,
R,
A,
R,
A,
R,
A,
R,
R
R
A
R
A
R
A
R
A
R
R
OR
AND
AND
XOR
XOR
ADD
ADD
MOV
MOV
COMA
COM
INCA
INC
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
None
None
R → R
/R → A
/R → R
R+1 → A
R
R
R
R+1 → R
DJZA
DJZ
R-1 → A, skip if zero
R-1 → R, skip if zero
R(n) → A(n-1),
R(0) → C, C → A(7)
R(n) → R(n-1),
R(0) → C, C → R(7)
R(n) → A(n+1),
R(7) → C, C → A(0)
R(n) → R(n+1),
R(7) → (C), C → (R(0)
R(0-3) → ( A(4-7),
R(4-7) → ( A(0-3)
R(0-3) → ( R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
0→ ( R(b)
R
R
0
0
0
0
0
0110 00rr
0110 01rr
0110 10rr
0110 11rr
0111 00rr
rrrr
rrrr
rrrr
rrrr
rrrr
06rr
06rr
06rr
06rr
07rr
RRCA
RRC
R
R
R
R
R
C
C
RLCA
RLC
C
C
SWAPA
None
0
0
0
0
0
0
0
0111 01rr
0111 10rr
0111 11rr
100b bbrr
101b bbrr
110b bbrr
111b bbrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
07rr
07rr
07rr
0xxx
0xxx
0xxx
0xxx
SWAP
JZA
JZ
R
R
R
None
None
None
None
None
None
None
BC
BS
JBC
JBS
R,
R,
R,
R,
b
b
b
b
1→ ( R(b)
if R(b)=0, skip
if R(b)=1, skip
PC+1 → [SP],
(Page, k) → (PC)
(Page, k) → (PC)
1
1
00kk kkkk kkkk
01kk kkkk kkkk
1kkk
1kkk
CALL
JMP
k
k
None
None
62 •
Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
