EM78P5840/5841/5842
8-bit Micro-controller
VII.8 Instruction Set
Instruction set has the following features:
(1) Every bit of any register can be set, cleared, or tested directly.
(2) The I/O register can be regarded as general register. That is, the same instruction can operates on I/O
register.
The symbol "R" represents a register designator which specifies which one of the 64 registers (including
operational registers and general purpose registers) is to be utilized by the instruction. Bits 6 and 7 in R4
determine the selected register bank. "b'' represents a bit field designator which selects the number of the bit,
located in the register "R'', affected by the operation. "k'' represents an 8 or 10-bit constant or literal value.
INSTRUCTION BINARY
STATUS
Instruction
HEX
0000
0001
0002
0003
0004
000r
0010
0011
0012
0013
MNEMONIC OPERATION
AFFECTED cycle
0
0
0
0
0
0
0
0
0
0
0000 0000 0000
0000 0000 0001
0000 0000 0010
0000 0000 0011
0000 0000 0100
0000 0000 rrrr
0000 0001 0000
0000 0001 0001
0000 0001 0010
0000 0001 0011
NOP
No Operation
None
C
1
1
1
1
1
1
1
1
2
2
DAA
CONTW
SLEP
WDTC
IOW R
ENI
Decimal Adjust A
A → CONT
None
T,P
0 → WDT, Stop oscillator
0 → WDT
T,P
A → IOCR
None
None
None
None
None
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC
Enable Interrupt
CONT → A
DISI
RET
RETI
0
0
0
0000 0001 0100
0000 0001 rrrr
0000 0010 0000
0014
001r
0020
CONTR
IOR R
TBL
None
None
1
1
2
IOCR → A
R2+A → R2 bits 9,10 do not Z,C,DC
clear
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000 01rr rrrr
0000 1000 0000
0000 11rr rrrr
0001 00rr rrrr
0001 01rr rrrr
0001 10rr rrrr
0001 11rr rrrr
0010 00rr rrrr
0010 01rr rrrr
0010 10rr rrrr
0010 11rr rrrr
0011 00rr rrrr
0011 01rr rrrr
0011 10rr rrrr
0011 11rr rrrr
0100 00rr rrrr
0100 01rr rrrr
0100 10rr rrrr
0100 11rr rrrr
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
MOV R,A
CLRA
A → R
None
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0 → A
Z
CLR R
0 → R
Z
SUB A,R
SUB R,A
DECA R
DEC R
R-A → A
R-A → R
R-1 → A
R-1 → R
A ∨ R → A
A ∨ R → R
A & R → A
A & R → R
A ⊕ R → A
A ⊕ R → R
A + R → A
A + R → R
R → A
Z,C,DC
Z,C,DC
Z
Z
OR A,R
Z
OR R,A
Z
AND A,R
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
MOV R,R
COMA R
COM R
Z
Z
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
R → R
/R → A
/R → R
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to change without notice.
28
2004/11/10 V2.6
ELAN [ ELAN MICROELECTRONICS CORP ]
