EM78P5840N/41N/42N
8-Bit Microcontrollers
VDD
OSC
Toscs
Power
on reset
Trst
/RESET
Tdrs
Tdrs
Program
Active
Figure 9-1 Relationship between OSC Stable Time and Power-on Reset
10.1 Operating Voltage vs Main CLK
Y axis: main CLK
MHz
14.3
3.58
V
2.2
3.6
5.5
X axis: min VDD
Figure 9-2 Relationship between Operating Voltage and the Main CLK
Product Specification (V1.0) 04.25.2006
(This specification is subject to change without further notice)
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