EM78P510N
8-Bit Microcontrollers
Fig 6-28 Capture Mode Timing Chart
6.13.4 PWM Mode
In Pulse Width Modulation (PWM) Output mode, counting down is performed using the
internal clock with prescaler or external clock trough T1CLK Pin or Sub Frequency with
prescaler. The Duty of PWM1 control by T1TD, and the period of PWM1 control by
T1PD. The pulse at the PWM1 pin is held to high level as long as the counter value of
T1TD greater than or equal to zero, while the pulse is held to low level until the counter
value of T1PD is underflow. The F/F is toggled when underflow. The counter is still
counting, the F/F is toggled again when the counter underflows, then the counter is
auto reload from T1PD. The F/F output is inverted and output to the /PWM pin. A
Timer1 interrupt is generated each time an underflow occurs. T1PD is configured as a
2-stage shift register and, during output, will not switch until one output cycle is
completed even if T1PD is overwritten. Therefore, the output can be changed
continuously. T1PD is also shifted the first time by setting T1S to “1” after data is
loaded to T1PD.
Fig 6-29 PWM Mode Timing Chart
6.13.5 16-Bit Mode
In 16-bit timer mode, all function in Timer 1 resolution become 16 bits.
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
