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EM78P510NAQ 参数 Datasheet PDF下载

EM78P510NAQ图片预览
型号: EM78P510NAQ
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: OTP只读存储器
文件页数/大小: 116 页 / 2156 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P510N  
8-Bit Microcontrollers  
Figure 6-4 TCC/WDT Block Diagram  
6.4 I/O Port  
Registers for I/O Circuit  
R_BANK Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0  
Bank 4  
Bank 5  
Bank 6  
0X07~0X0C PIOCR IOC7  
IOC6  
R/W  
PH6  
R/W  
OD6  
R/W  
IOC5  
R/W  
PH5  
R/W  
OD5  
R/W  
IOC4  
R/W  
PH4  
R/W  
OD4  
R/W  
IOC3  
R/W  
PH3  
R/W  
OD3  
R/W  
IOC2  
R/W  
PH2  
R/W  
OD2  
R/W  
IOC1  
R/W  
PH1  
R/W  
OD1  
R/W  
IOC0  
R/W  
PH0  
R/W  
OD0  
R/W  
R/W  
0X07~0X0C PHCR  
PH7  
R/W  
0X07~0X0B ODCR OD7  
R/W  
The I/O registers, (Port 7, Port 8, Port 9, Port A, Port B and Port C), are bidirectional  
tri-state I/O ports. All pins are pulled-high internally by software. Likewise, Port 7, Port  
8, Port 9, Port A, Port B and Port C, can have open-drain output also through software.  
Port 7 [7:4], Port B [3:0] and Port 8 [3:2] provides an input status changed interrupt (or  
wake-up) function and is pulled-high by software. Each I/O pin can be defined as  
"input" or "output" pin by the I/O control register Bank 4 R7 ~ RC. The I/O registers and  
I/O control registers are both readable and writeable. The I/O interface circuits are  
shown in Fig. 6-5.  
The I/O cannot be set to pull-high and output low at the same time. It can relatively  
increase the power consumption.  
Product Specification (V0.9) 09.12.2006  
(This specification is subject to change without further notice)  
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