EM78P510N
8-Bit Microcontrollers
6.10.1 ADC Data Register
When the A/D conversion is completed, the result is loaded to the ADDH (8-bit) and
ADDL (4-bit). The START/END bit is cleared, and the ADIF is set.
6.10.2 A/D Sampling Time
The accuracy, linearity, and speed of the successive approximation A/D converter are
dependent on the properties of the ADC. The source impedance and the internal
sampling impedance directly affect the time required to charge the sample holding
capacitor. The application program controls the length of the sample time to meet the
specified accuracy. Generally speaking, the program should wait for 2 µs for each KΩ
of the analog source impedance and at least 2 µs for the low-impedance source. The
maximum recommended impedance for the analog source is 10KΩ at VDD =5V. After
the analog input channel is selected, this acquisition time must be done before A/D
conversion can be started.
6.10.3 A/D Conversion Time
ADCK0 and ADCK1 select the conversion time (Tct), in terms of instruction cycles.
This allows the MCU to run at maximum frequency without sacrificing accuracy of A/D
conversion. For the EM78P510N, the conversion time per bit is about 4µs. Table 8
shows the relationship between Tct and the maximum operating frequencies.
Table 8
Max. Frequency
(Fc)
Max. Conversion
Rate per Bit
Max. Conversion
Rate
ADCK1:0 Operation Mode
0 0
0 1
1 0
1 1
Fc/4
Fc/16
Fc/32
Fc/64
1MHz
4MHz
8MHz
16MHz
250kHz (4µs)
250kHz (4µs)
250kHz (4µs)
250kHz (4µs)
56us(17.86kHz)
56us(17.86kHz)
56us(17.86kHz)
56us(17.86kHz)
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
