EM78P510N
8-Bit Microcontrollers
The EM78P510N can drive LCD, up to 23 segments and 8 commons that can drive
8×23 dots totally. LCD block is made up of LCD driver, display RAM, segment output
pins, common output pins and LCD operating power supply pins. This circuit can work
on normal mode, green mode and idle mode.
The LCD duty, bias, the number of segment, the number of common and frame
frequency are determined by the LCD controller register.
The basic structure contains a timing control which use the main system clock or
subsystem clock to generate the proper timing for different duty and display access.
The R5 register is command register for LCD driver that include LCD enable/disable,
bias (1/2, 1/3 and 1/4), duty (Static, 1/3, 1/4, 1/8) and LCD frame frequency control.
The register bank 1 R6 is LCD RAM address control register. The register bank 1 R7 is
LCD RAM data buffer. The register bank1 R8 is LCD contrast control and LCD clock
register. The control register is explained below.
6.9.1 R5 LCDCR (LCD Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LCDEN LCDTYPE
BS1
BS0
DS1
DS0
LCDF1
LCDF0
Bit 7 (LCDEN): LCD Enable Select Bit
0 : disable LCD Circuit. All common/segment outputs are set to VDD
Level.
1 : enable LCD circuit
Bit 6 (LCDTYPE): LCD Drive Waveform Type Select Bit
0 : A type wave
1 : B type wave
Bits 5~4 (BS1~BS0): LCD Bias Select Bits
BS1
BS0
0
LCD Bias Select
1/2 Bias
0
0
1
1
1/3 Bias
X
1/4 Bias
Bits 3~2 (DS1~DS0): LCD Duty Select Bits
DS1
DS0
LCD Duty
Static
0
0
1
1
0
1
0
1
1/3 Duty
1/4 Duty
1/8 Duty
60 •
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
